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Ke Zhao, 43San Jose, CA

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Us Patents

Hessian-Free Calculation Of Product Of Hessian Matrix And Vector For Lithography Optimization

US Patent:
2020006, Feb 27, 2020
Filed:
Aug 27, 2018
Appl. No.:
16/113183
Inventors:
- Chandler AZ, US
Ke Zhao - San Jose CA, US
Yuan He - San Jose CA, US
International Classification:
G03F 1/70
G06F 17/50
Abstract:
A method for optimizing a binary mask pattern includes determining, by a processor, an evaluation value based on a comparison between a design pattern and a substrate pattern simulated based on the binary mask pattern. The method also includes, based on the evaluation value, using, by the processor, a gradient-based optimization method to generate a first adjusted binary mask pattern. The method also includes determining, by the processor, a first updated evaluation value based on a comparison between the design pattern and a first updated substrate pattern simulated based on the first adjusted binary mask pattern. The method also includes, based on the first updated evaluation value, using, by the processor, a product of a Hessian matrix and an arbitrary vector to generate a second adjusted binary mask pattern. The method also includes simulating, by the processor, a second updated substrate pattern based on the second adjusted binary mask pattern.

Mask Bias Approximation

US Patent:
2019035, Nov 21, 2019
Filed:
May 15, 2018
Appl. No.:
15/979751
Inventors:
- San Jose CA, US
Ke Zhao - San Jose CA, US
Yang Cao - San Jose CA, US
Jihui Huang - San Jose CA, US
International Classification:
G03F 1/70
G03F 1/36
G03F 1/20
Abstract:
Directly biasing a mask image is disclosed. A method includes generating a mask image for the mask, biasing the mask image to obtain a biased mask image, and simulating the biased mask image to obtain a wafer image to be compared to the design pattern. Biasing the mask image includes updating at least one pixel of the mask image using an interpolation of neighboring pixels of the at least one pixel, the interpolation being dependent on a predetermined value.

Application Of Freeform Mrc To Sraf Optimization Based On Ilt Mask Optimization

US Patent:
2019034, Nov 14, 2019
Filed:
May 8, 2018
Appl. No.:
15/973809
Inventors:
- San Jose CA, US
Ke Zhao - San Jose CA, US
Jiangwei Li - San Jose CA, US
International Classification:
G03F 7/20
Abstract:
Extracting shapes from a pixelated SRAF bitmap image of pixels for mask making is disclosed. A method includes receiving the pixelated SRAF bitmap image of pixels, each pixel having a respective brightness value; selecting a ridge point in the pixelated SRAF bitmap image; for each pixel of at least some of the pixels, determining a respective arrival time at the pixel; and determining a mask shape using the arrival times of the at least some of the pixels. The ridge point is one of the pixels and is selected based on the respective brightness value of the one of the pixels. An arrival time is based on a respective brightness value of the pixel and a Mask Rule Check (MRC) rule.

Full Chip Lithographic Mask Generation

US Patent:
2017024, Aug 24, 2017
Filed:
Feb 23, 2017
Appl. No.:
15/441003
Inventors:
- San Jose CA, US
Jihui Huang - San Jose CA, US
Ke Zhao - San Jose CA, US
International Classification:
G03F 1/36
G06T 1/20
G06F 17/50
G06T 7/00
Abstract:
A method, an apparatus, and a non-transitory computer readable medium for full chip mask pattern generation include: generating, by a processor, an initial mask image from target polygons, performing, by the processor, a global image based full chip optimization of the initial mask image to generate new mask pattern polygons, wherein the global image based full chip optimization co-optimizes main feature polygons and SRAF image pixels, determining performance index information based on the global image based full chip optimization, wherein the performance index information comprises data for assisting a global polygon optimization, generating a mask based on the global polygon optimization of the new mask pattern polygons using the performance index information, and generating optimized mask patterns based on a localized polygon optimization of the mask.

Cross Antennas For Surface-Enhanced Infrared Absorption (Seira) Spectroscopy Of Chemical Moieties

US Patent:
2014026, Sep 18, 2014
Filed:
Mar 13, 2014
Appl. No.:
14/209310
Inventors:
Lisa V. Brown - Houston TX, US
Ke Zhao - Houston TX, US
Nancy J. Halas - Houston TX, US
Peter J. Nordlander - Houston TX, US
Assignee:
William Marsh Rice University - Houston TX
International Classification:
G01N 21/35
US Classification:
2503381
Abstract:
A device for Surface Enhanced Infrared Absorption (SEIRA) that includes at least one pair of metallic antennas deposited on a substrate, wherein the pair of metallic antennas are collinear. The length, width, and height of the metallic antenna determines an infrared absorption of the pair of metallic antennas. The device also includes a gap located between the pair of metallic antennas. A chemical moiety is disposed on at least a portion of the metallic antennas such that the infrared absorption of the chemical moiety is enhanced by the at least one pair of metallic antennas.

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