Inventors:
Alexander L. Minkin - Los Altos CA, US
Joel J. McCormack - Boulder CO, US
Paul S. Heckbert - Pittsburgh PA, US
Michael J. M. Toksvig - Palo Alto CA, US
Luke Y. Chang - San Mateo CA, US
Karim Abdalla - Menlo Park CA, US
Bo Hong - Fremont CA, US
John W. Berendsen - Beaconsfield, CA
Walter Donovan - Saratoga CA, US
Emmett M. Kilgariff - San Jose CA, US
Assignee:
NVIDIA Corporation - Santa Clara CA
International Classification:
G06T 17/00
G06T 11/40
G09G 5/00
G09G 5/02
G06K 9/40
G06K 9/32
G06K 9/64
US Classification:
345582, 345428, 345587, 345606, 345552, 382254, 382260, 382300, 382303, 711100, 711113, 711123, 711127
Abstract:
Circuits, methods, and apparatus that provide texture caches and related circuits that store and retrieve texels in a fast and efficient manner. One such texture circuit provides an increased number of bilerps for each pixel in a group of pixels, particularly when trilinear or aniso filtering is needed. For trilinear filtering, texels in a first and second level of detail are retrieved for a number of pixels during a clock cycle. When aniso filtering is performed, multiple bilerps can be retrieved for each of a number of pixels during one clock cycle.