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Darin W Peterson, 45Boise, ID

Darin Peterson Phones & Addresses

Boise, ID   

Wheatland, ND   

Casselton, ND   

Mapleton, ND   

Arthur, ND   

Bryan, TX   

College Station, TX   

Rosholt, SD   

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Darin William Peterson

Address:
Casselton, ND 58012
Licenses:
License #: 2107 - Active
Category: Veterinarian Medicine
Issued Date: Feb 7, 2007
Renew Date: Mar 1, 2015
Expiration Date: Feb 28, 2017
Type: Veterinarian Medicine

Darin Peterson resumes & CV records

Resumes

Darin Peterson Photo 45

President And Chief Executive Officer

Location:
Boise, ID
Industry:
Information Technology And Services
Work:
Ett Aviation
Skedflex Technical Director
Hewlett-Packard 2006 - 2011
Senior Software Engineer Iii
Peterson Tech 2006 - 2011
President and Chief Executive Officer
Micron Technology Nov 1997 - Feb 2003
Senior Process and Product Engineer
Northwest Molding and Manufacturing Jun 1995 - Feb 1997
Mechanical Engineer
Education:
Boise State University 1991 - 2005
Bachelors, Bachelor of Science In Computer Science
Boise State University 2003 - 2005
Bachelors, Bachelor of Science, Computer Science
University of Idaho 1990 - 1995
Bachelor of Science In Mechanical Engineering, Bachelors, Bachelor of Science, Mechanical Engineering
Skills:
C++, Web Services, Agile Methodologies, .Net, Software Development, Visual Studio, Project Management, Product Development, Requirements Analysis, Testing, Software Project Management, C#, Jquery, Jquery Ui, Postgresql, Mysql, Mysqli, Php, Customer Service, Software Design, Software Architectural Design, Software Solution Architecture, User Interface Design, Server Administration, Lamp, Lamp Administration, Optimization Software, Requirements Management, Mechanical Engineering, Mechanical Product Design, Solid Edge, Autocad Mechanical, Autocad, Stress Analysis, Product Design, Injection Molding, Precision Tooling, Smartcam, Asp.net Mvc, Git, Web Applications, Scrum, Design Patterns, Oop, Software Engineering, C, Program Management, Open Source, Linux, Xml
Darin Peterson Photo 46

Darin Peterson

Darin Peterson Photo 47

Darin Peterson

Darin Peterson Photo 48

Darin Peterson

Location:
United States

Publications & IP owners

Us Patents

Method And Apparatus For Marking Microelectronic Dies And Microelectronic Devices

US Patent:
6673692, Jan 6, 2004
Filed:
Aug 30, 2001
Appl. No.:
09/945315
Inventors:
Darin L. Peterson - Boise ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 2176
US Classification:
438401
Abstract:
Method and apparatus for marking microelectronic devices, such as bare microelectronic dies and packaged devices, to enhance the identification and automatic handling of wafers, dies and packaged devices. In one embodiment, a microelectronic device comprises a microelectronic die having an integrated circuit, a hidden marking layer superimposed relative to the die, and a cover layer over the hidden marking layer. The hidden marking layer can be applied to a surface of the die and/or a surface of a package encasing at least a portion of the die such that in either situation the hidden marking layer is superimposed relative to the die. In one embodiment, the hidden marking layer is a material that (a) can be removed by a scribing energy (e. g. , incinerated or otherwise consumed), and/or (b) is at least partially opaque to an exposure energy. The hidden marking layer can also have a depression defining an identification mark through which at least a portion of the exposure energy can penetrate.

Method And Apparatus For Marking Microelectronic Dies And Microelectronic Devices

US Patent:
6731016, May 4, 2004
Filed:
Jun 25, 2002
Appl. No.:
10/183192
Inventors:
Darin L. Peterson - Boise ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 23544
US Classification:
257797, 438401
Abstract:
Method and apparatus for marking microelectronic devices, such as bare microelectronic dies and packaged devices, to enhance the identification and automatic handling of wafers, dies and packaged devices. In one embodiment, a microelectronic device includes a first exterior surface, a second exterior surface having a contact array with a plurality of contacts, and an integrated circuit coupled to the contacts. The microelectronic device can further include a marking medium applied to the first exterior surface of the device. In one embodiment, the marking medium includes a contrast film section having an underlying contrast film applied to the first exterior surface and an outer contrast film applied to the underlying contrast film. In another embodiment, the marking medium can include a contrast film section having only an outer contrast film applied to the first exterior surface of the device. The outer contrast film can have a high optical contrast with respect to the underlying contrast film or the first exterior surface of the device, and the outer contrast film can be changed by a selected radiation so that a portion of the outer contrast film can be selectively removed from the device.

Method And Apparatus For Marking Microelectronic Dies And Microelectronic Devices

US Patent:
6744144, Jun 1, 2004
Filed:
Feb 27, 2003
Appl. No.:
10/377552
Inventors:
Darin L. Peterson - Boise ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 23544
US Classification:
257797
Abstract:
Method and apparatus for marking microelectronic devices, such as bare microelectronic dies and packaged devices, to enhance the identification and automatic handling of wafers, dies and packaged devices. In one embodiment, a microelectronic device comprises a microelectronic die having an integrated circuit, a hidden marking layer superimposed relative to the die, and a cover layer over the hidden marking layer. The hidden marking layer can be applied to a surface of the die and/or a surface of a package encasing at least a portion of the die such that in either situation the hidden marking layer is superimposed relative to the die. In one embodiment, the hidden marking layer is a material that (a) can be removed by a scribing energy (e. g. , incinerated or otherwise consumed), and/or (b) is at least partially opaque to an exposure energy. The hidden marking layer can also have a depression defining an identification mark through which at least a portion of the exposure energy can penetrate.

Methods And Apparatus For Retaining A Tray Stack Having A Plurality Of Trays For Carrying Microelectronic Devices

US Patent:
6866470, Mar 15, 2005
Filed:
Nov 1, 2001
Appl. No.:
10/035375
Inventors:
Darin L. Peterson - Boise ID, US
Michael R. Slaughter - Boise ID, US
Keith P. McCall - Meridian ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
B65G059/06
US Classification:
414801, 221222, 221297, 4147887, 4147981
Abstract:
Devices and methods for holding a tray stack having a plurality of trays configured to carry and store microelectronic devices. Several devices in accordance with the present invention are particularly applicable to carrying a stack of JEDEC trays that have been loaded with a plurality of microelectronic devices. In one embodiment, the device is a tray retainer including a guide structure configured to allow the tray stack to move in a direction of a load/unload path, and to restrict lateral movement of the tray stack with respect to the load/unload path. The guide structure can have a first end, a second end, and an opening at least proximate to the second end. The guide structure, for example, can have first and second channel sections extending in the direction of the load/unload path. The second channel section can also face the first channel section. The tray retainer can also include a cross-member and a moveable retaining element.

Microelectronic Component Assemblies Having Exposed Contacts

US Patent:
6921860, Jul 26, 2005
Filed:
Mar 18, 2003
Appl. No.:
10/391725
Inventors:
Darin L. Peterson - Boise ID, US
Richard W. Wensel - Boise ID, US
Choon Kuan Lee - Singapore, SG
James A. Faull - Boise ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L023/552
US Classification:
174 522, 22818022, 257780, 26437211
Abstract:
The present disclosure suggests various microelectronic component assembly designs and methods for manufacturing microelectronic component assemblies. In one particular implementation, a microelectronic component includes an array of spaced-apart dams, each of which is associated with and circumscribes an open contact volume associated with one of the contacts. A dielectric material may cover the portion of the microelectronic component active surface that is external to the dams and extend between the spaced-apart dams.

Methods And Apparatus For Retaining A Tray Stack Having A Plurality Of Trays For Carrying Microelectric Devices

US Patent:
7066708, Jun 27, 2006
Filed:
Oct 19, 1999
Appl. No.:
09/420659
Inventors:
Darin L. Peterson - Boise ID, US
Michael R. Slaughter - Boise ID, US
Keith P. McCall - Meridian ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
B65G 59/06
US Classification:
4147981, 221222, 221237, 4147957, 414907
Abstract:
Devices and methods for holding a tray stack having a plurality of trays configured to carry and store microelectronic devices. Several devices in accordance with the present invention are particularly applicable to carrying a stack of JEDEC trays that have been loaded with a plurality of microelectronic devices. In one embodiment, the device is a tray retainer including a guide structure configured to allow the tray stack to move in a direction of a load/unload path, and to restrict lateral movement of the tray stack with respect to the load/unload path. The guide structure can have a first end, a second end, and an opening at least proximate to the second end. The guide structure, for example, can have first and second channel sections extending in the direction of the load/unload path. The second channel section can also face the first channel section. The tray retainer can also include a cross-member and a moveable retaining element.

Methods And Apparatus For Retaining A Tray Stack Having A Plurality Of Trays For Carrying Microelectronic Devices

US Patent:
7086562, Aug 8, 2006
Filed:
Nov 1, 2001
Appl. No.:
09/999032
Inventors:
Darin L. Peterson - Boise ID, US
Michael R. Slaughter - Boise ID, US
Keith P. McCall - Meridian ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
B65G 59/00
US Classification:
221297, 221222, 221237
Abstract:
Devices and methods for holding a tray stack having a plurality of trays configured to carry and store microelectronic devices. Several devices in accordance with the present invention are particularly applicable to carrying a stack of JEDEC trays that have been loaded with a plurality of microelectronic devices. In one embodiment, the device is a tray retainer including a guide structure configured to allow the tray stack to move in a direction of a load/unload path, and to restrict lateral movement of the tray stack with respect to the load/unload path. The guide structure can have a first end, a second end, and an opening at least proximate to the second end. The guide structure, for example, can have first and second channel sections extending in the direction of the load/unload path. The second channel section can also face the first channel section. The tray retainer can also include a cross-member and a moveable retaining element.

Methods And Apparatus For Retaining A Tray Stack Having A Plurality Of Trays For Carrying Microelectronic Devices

US Patent:
2002003, Mar 21, 2002
Filed:
Nov 1, 2001
Appl. No.:
09/999335
Inventors:
Darin Peterson - Boise ID, US
Michael Slaughter - Boise ID, US
Keith McCall - Meridian ID, US
International Classification:
B65G059/06
B65G057/30
US Classification:
414/798100, 414/795300
Abstract:
Devices and methods for holding a tray stack having a plurality of trays configured to carry and store microelectronic devices. Several devices in accordance with the present invention are particularly applicable to carrying a stack of JEDEC trays that have been loaded with a plurality of microelectronic devices. In one embodiment, the device is a tray retainer including a guide structure configured to allow the tray stack to move in a direction of a load/unload path, and to restrict lateral movement of the tray stack with respect to the load/unload path. The guide structure can have a first end, a second end, and an opening at least proximate to the second end. The guide structure, for example, can have first and second channel sections extending in the direction of the load/unload path. The second channel section can also face the first channel section. The tray retainer can also include a cross-member and a moveable retaining element. The cross-member can extend transverse to the load/unload path at least partially across a first region of the guide structure between the first and second channel sections. The cross-member can be spaced apart from the opening toward the first end of the guide structure. The moveable retaining element is positioned at a second region of the guide structure spaced apart from the cross-member. The retaining element can move between a storage position in which it obstructs the load/unload path and a load/unload position in which it does not obstruct the load/unload path.

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