BackgroundCheck.run
Search For

Kurt R Raab, 54Mesa, AZ

Kurt Raab Phones & Addresses

Mesa, AZ   

347 Wildwood Dr, Phoenix, AZ 85048    480-2831396   

1208 Hiddenview Dr, Phoenix, AZ 85048   

9605 48Th St, Phoenix, AZ 85044   

Chandler, AZ   

Harsens Island, MI   

San Jose, CA   

Sunnyvale, CA   

Fremont, CA   

Maricopa, AZ   

Social networks

Kurt R Raab

Linkedin

Industries

Semiconductors

Mentions for Kurt R Raab

Resumes and CV

Resumes

Kurt Raab Photo 1

Kurt Raab

Location:
Phoenix, Arizona Area
Industry:
Semiconductors

Publications

Wikipedia

Kurt Raab Photo 2

Kurt Raab

Kurt Raab (20 July 1941 28 June 1988) was a West German stage and film actor, as well as a screenwriter and playwright. Raab is best remembered for his ...

Us Patents

Transferable Resilient Element For Packaging Of A Semiconductor Chip And Method Therefor

US Patent:
6686015, Feb 3, 2004
Filed:
Jun 20, 2001
Appl. No.:
09/885684
Inventors:
Kurt Raab - San Jose CA
John W. Smith - Palo Alto CA
Assignee:
Tessera, Inc. - San Jose CA
International Classification:
B32B 300
US Classification:
428 401, 174 521, 428 414, 428 415, 428 417, 428 418, 428 421, 428201, 428202
Abstract:
A transferable resilient element assembly for fabricating a microelectronic package includes a first liner having a tacky material and a plurality of resilient elements, the plurality of resilient elements having a first surface being in contact with the the first liner. The plurality of resilient elements adhere to the tacky material so that upon removal of the plurality of resilient elements from the liner, the tacky material will adhere to the plurality of resilient elements and provide a tacky surface thereon.

Apparatus For Processing Flexible Tape For Microelectronic Assemblies

US Patent:
6687980, Feb 10, 2004
Filed:
Aug 11, 2000
Appl. No.:
09/636664
Inventors:
Joseph Link - Pleasanton CA
Kurt Raab - San Jose CA
Assignee:
Tessera, Inc. - San Jose CA
International Classification:
B23P 1900
US Classification:
29760, 29827, 292811, 292815, 361736
Abstract:
An apparatus for processing flexible tape for microelectronic assemblies includes a base having a top surface, a bottom surface and an aperture extending between the top and bottom surfaces, and a platform having a top surface for engaging a flexible tape used for making microelectronic assemblies, such as semiconductor chip packages. The platform is sized to fit within the aperture extending between the top and bottom surfaces of the base. The base is pivotally secured at one end of the platform so that when the base pivots with respect to the platform, the flexible tape engaged by the platform remains on the platform. The assembly also includes a carrier frame having a slot and a clamp sized to pass through the slot and the carrier frame and the aperture in the base for securing the flexible tape to the top surface of the platform as the base pivots with respect to the platform.

Multiple Part Compliant Interface For Packaging Of A Semiconductor Chip And Method Therefor

US Patent:
5915170, Jun 22, 1999
Filed:
Sep 16, 1997
Appl. No.:
8/931680
Inventors:
Kurt Raab - San Jose CA
Thomas Pickett - Santa Clara CA
Thomas H. Di Stefano - Monte Sereno CA
Assignee:
Tessera, Inc. - San Jose CA
International Classification:
H01L 2144
H01L 2148
H01L 2150
US Classification:
438118
Abstract:
A method of making a multiple part compliant interface for a microelectronic package including the steps of providing a first microelectronic element having electrically conductive parts, providing an array of curable elastomer support pads in contact with the first microelectronic element, curing the curable elastomer support pads while the support pads remain in contact with the first microelectronic element and providing an array of adhesive pads in contact with the support pads, whereby each adhesive pad is disposed over and in substantial alignment with one of the support pads. A second microelectronic element having electrically conductive parts is then assembled in contact with the array of adhesive pads by abutting the second microelectronic element against the array of adhesive pads and compressing the adhesive pads and support pads between the first and second microelectronic elements. The array of adhesive pads are then cured and the electrically conductive parts of the first and second microelectronic elements are interconnected. The array of support pads define channels running between any two adjacent support pads.

Electronic System Using Multi-Layer Tab Tape Semiconductor Device Having Distinct Signal, Power And Ground Planes

US Patent:
5801432, Sep 1, 1998
Filed:
Apr 16, 1996
Appl. No.:
8/632962
Inventors:
Michael D. Rostoker - Boulder Creek CA
Kurt Raymond Raab - San Jose CA
John McCormick - Redwood City CA
Assignee:
LSI Logic Corporation - Milpitas CA
International Classification:
H01L 23495
US Classification:
257666
Abstract:
Electronic systems using separate and distinct conductive layers for power and ground are insulated from one another and a patterned signal conductive layer to form a flexible substrate for mounting a semiconductor die in a semiconductor device assembly of the system. TAB technology is utilized to produce an assembly that has superior electrical characteristics because power and ground is conducted on separate low impedance conductive layers. The power and ground leads connecting the semiconductor die and external circuits are selected from the signal trace layer, cut bent downward and attached by bonding to the respective power or ground layer. A tool is disclosed for cutting the selected leads. The present invention further provides a system utilizing a wafer probe card which includes a multi-layer, relatively flexible tape-like substrate having a first conductive layer patterned to have a number of probe leads thereon. The first conductive layer of probe leads are formed on an insulating layer having an inner peripheral edge defining a central opening in which an IC die is placed for testing.

Transferable Resilient Element For Packaging Of A Semiconductor Chip And Method Therefor

US Patent:
6294040, Sep 25, 2001
Filed:
Jun 20, 1997
Appl. No.:
8/879922
Inventors:
Kurt Raab - San Jose CA
John W. Smith - Palo Alto CA
Assignee:
Tessera, Inc. - San Jose CA
International Classification:
B32B 3100
H01L 2144
US Classification:
156249
Abstract:
A method for making a microelectronic package includes providing first and second microelectronic elements having electrically conductive parts, juxtaposing the first and second microelectronic elements with one another, bonding electrically conductive parts of the microelectronic elements together to form electrical interconnection, providing a resilient element having one or more tacky surface regions in contact with one or more liners separately from the first and second microelectronic elements, assembling the resilient element with at least one of said microelectronic elements, and removing the resilient element from the one or more liners prior to the juxtaposing step so that the resilient element is disposed between the microelectronic elements after the juxtaposing and bonding steps. In other embodiments, the method of making a microelectronic package includes providing a resilient element having one or more tacky surface regions separately from the first and second microelectronic elements, and assembling the resilient elements with at least one of the microelectronic elements prior to the juxtaposing step so that the resilient element is disposed between the microelectronic elements after the juxtaposing and bonding steps, wherein the step of assembling the resilient element with at least one of the microelectronic elements is performed less than 24 hours prior to the bonding step. In certain embodiments the resilient elements include an adhesive at one or more tacky surface regions thereof.

Universal Unit Strip/Carrier Frame Assembly And Methods

US Patent:
6170151, Jan 9, 2001
Filed:
Nov 19, 1999
Appl. No.:
9/443530
Inventors:
Joseph Link - Pleasanton CA
Kurt Raab - San Jose CA
Assignee:
Tessera, Inc. - San Jose CA
International Classification:
B23P 1904
US Classification:
29740
Abstract:
An assembly for processing a flexible tape comprises a carrier frame having a slot and a cut-out region contiguous with one end of the slot for selectively transferring the flexible tape from the top surface of the carrier frame to the bottom surface of the carrier frame. An apparatus for processing the flexible tape is also disclosed and includes the carrier frame, a base having an aperture and a platform sized to fit within the aperture of the base. The base is pivotable around one end of the platform.

Multi-Layer Tab Tape Having Distinct Signal, Power And Ground Planes, Semiconductor Device Assembly Employing Same, Apparatus For And Method Of Assembling Same

US Patent:
5854085, Dec 29, 1998
Filed:
Apr 24, 1996
Appl. No.:
8/638898
Inventors:
Kurt Raymond Raab - San Jose CA
John McCormick - Redwood City CA
Assignee:
LSI Logic Corporation - Milpitas CA
International Classification:
H01L 2160
US Classification:
437211
Abstract:
Separate and distinct conductive layers for power and ground are insulated from one another and a patterned signal conductive layer to form a flexible substrate for mounting a semiconductor die in a semiconductor device assembly. TAB technology is utilized to produce an assembly that has superior electrical characteristics because power and ground is conducted on separate low impedance conductive layers. The power and ground leads connecting the semiconductor die and external circuits are selected from the signal trace layer, cut bent downward and attached by bonding to the respective power or ground layer. A tool is disclosed for cutting the selected leads. A method of attaching solder balls to a TBGA film using solder flux and photoimageable solder resist definition is also disclosed.

Methods Of Making Compliant Interfaces And Microelectronic Packages Using Same

US Patent:
6300254, Oct 9, 2001
Filed:
Apr 16, 1999
Appl. No.:
9/293005
Inventors:
Kurt Raab - Phoenix AZ
Assignee:
Tessera, Inc. - San Jose CA
International Classification:
H01L 2144
H01L 2148
H01L 2150
H01L 2131
H01L 21469
US Classification:
438778
Abstract:
A method of making a compliant interface includes providing a support structure and forming a plurality of compliant pads on the support structure by moving a sheet or mold having apertures toward a layer of flowable composition disposed on the support structure. A method of making a microelectronic package includes juxtaposing a microelectronic element with the compliant interface. Leads are formed between the microelectronic element and the substrate. An encapsulant may be disposed between the microelectronic element and the substrate.

Isbn (Books And Publications)

Die Sehnsucht Des Rainer Werner Fassbinder

Author:
Kurt Raab
ISBN #:
3570031179

NOTICE: You may not use BackgroundCheck or the information it provides to make decisions about employment, credit, housing or any other purpose that would require Fair Credit Reporting Act (FCRA) compliance. BackgroundCheck is not a Consumer Reporting Agency (CRA) as defined by the FCRA and does not provide consumer reports.