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Patrick C Coffield, 803851 20Th St, Gainesville, FL 32605

Patrick Coffield Phones & Addresses

3851 20Th St, Gainesville, FL 32605    352-3800594   

3851 20Th Ln, Gainesville, FL 32605    352-3800594   

Shalimar, FL   

Valparaiso, FL   

Niceville, FL   

3851 NW 20Th Ln, Gainesville, FL 32605   

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Patrick C Coffield

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Work

Company: Uc santa barbara Position: Retired at uc santa barbara

Education

Degree: Graduate or professional degree

Industries

Higher Education

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Patrick Coffield resumes & CV records

Resumes

Patrick Coffield Photo 16

Patrick Coffield

Location:
P/O Box 903, Coeur D Alene, ID
Industry:
Higher Education
Work:
Uc Santa Barbara
Retired at Uc Santa Barbara

Publications & IP owners

Us Patents

Comparator Stack Architecture For Order Statistic Filtering Of Digital Imagery

US Patent:
5426785, Jun 20, 1995
Filed:
Mar 25, 1993
Appl. No.:
8/037152
Inventors:
Patrick C. Coffield - Shalimar FL
Assignee:
The United States of America as represented by the Secretary of the Air
Force - Washington DC
International Classification:
G06F 1566
G06F 706
US Classification:
395800
Abstract:
This is a circuit design for determining the order statistics of an arbitrary (length and value) string of numbers as the string is acquired. The circuit is intended for use with a system covered by my copending application titled "A High Performance Architecture for Image Processing", Ser. No. 07/904,315, filed Jun. 25, 1992. This circuit can be connected to each of the fine grain computational cells of that system to provide the desired filtering action (e. g. , median filter). The configuration of the circuit is based upon the notion of a stack operation using comparator circuits as positions in the stack. Each comparator circuit has a counter connected to its output line that indicates a "greater than" condition. A hardware pointer indicates the top position of the stack. Then, as a string value is "pushed" onto the top of the stack, the top value is simultaneously compared to the remaining values in the stack.

High Performance Architecture For Image Processing

US Patent:
5262968, Nov 16, 1993
Filed:
Jun 25, 1992
Appl. No.:
7/904315
Inventors:
Patrick C. Coffield - Shalimar FL
Assignee:
The United States of America as represented by the Secretary of the Air
Force - Washington DC
International Classification:
G06E 300
G06J 300
US Classification:
364604
Abstract:
The logical computer architecture is specifically designed for image processing, and other related computations. The architecture is a data flow concept comprising three tightly coupled components: a spatial configuration processor, a point-wise operation processor, and a accumulation operation processor. The data flow and image processing operations are directed by the control buffer and pipelined to each of the three processing components. The image processing operations are defined by an image algebra capable of describing all common image-to-image transformations. The merit of this architectural design is how elegantly it handles the natural decomposition of algebraic functions into spatially distributed, point-wise operations. The effect of this particular decomposition allows convolution to be computed strictly as a function of the number of elements in the template (mask, filter, etc. ) instead of the number of pixels in the image.

Isbn (Books And Publications)

Parallel And Distributed Methods For Image Processing: 28-29 July 1997, San Diego, California

Author:
Patrick C. Coffield
ISBN #:
0819425885

Parallel And Distributed Methods For Image Processing Ii: 19-20 July, 1998, San Diego, California

Author:
Patrick C. Coffield
ISBN #:
0819429074

Parallel And Distributed Methods For Image Processing Iii

Author:
Patrick C. Coffield
ISBN #:
0819433039

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