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Stuart D Albert, 78270 Texas Dr, Bricktown, NJ 08723

Stuart Albert Phones & Addresses

270 Texas Dr, Brick, NJ 08723    732-9209299   

Bradley Beach, NJ   

Shaw Crest, NJ   

Work

Company: Booz allen hamilton Feb 2008 Position: Independent consultant/subcontractor

Education

School / High School: State University of New York at Stony Brook- Stony Brook, NY 1971 Specialities: M.A. in Mathematics

Mentions for Stuart D Albert

Stuart Albert resumes & CV records

Resumes

Stuart Albert Photo 22

Stuart Albert - Township of Brick, NJ

Work:
Booz Allen Hamilton Feb 2008 to Dec 2008
Independent Consultant/Subcontractor
Booz Allen Hamilton Feb 2008 to Dec 2008
Independent Consultant/Subcontractor
Telos Corp Nov 1999 to Apr 2002
Telecommunications Systems Engineer
Maden Tech Consulting Nov 1997 to Jun 1998
Senior Technical Program Analyst
Electronics Technology and Devices Lab Oct 1986 to Jun 1997
Electronic Engineer
Army Research Laboratory - Fort Monmouth, NJ 1986 to 1997
Electronic Engineer
COMM/ADP LAB, Fort Monmouth May 1977 to Oct 1986
Electronic Engineer
U.S. Army Communications 1977 to 1986
Electronic Engineer
Combat Surveillance/ Target Acquisition Lab Dec 1973 to May 1977
Physicist
U.S. Army CECOM 1972 to 1977
Physicist
Fort Monmouth Jan 1972 to Dec 1973
Physicist
Education:
State University of New York at Stony Brook - Stony Brook, NY 1971
M.A. in Mathematics
Queens College of the City University of New York 1968
B.A. in Physics

Publications & IP owners

Us Patents

Method And Apparatus For Minimizing The Number Of Power Amplifiers Required Under Multiple Transmission Conditions

US Patent:
7239268, Jul 3, 2007
Filed:
Sep 5, 2002
Appl. No.:
10/235215
Inventors:
Stuart D. Albert - Bricktown NJ, US
John F. Prorok - Neptune NJ, US
Joan Skudera, legal representative - Oceanport NJ, US
Assignee:
The United States of America as represented by the Secretary of the Army - Washington DC
International Classification:
G01S 7/28
G01S 13/00
US Classification:
342202, 342118, 342134, 342175, 342195, 398 79, 398 80, 398140, 398141, 398146, 398173, 398178, 398179
Abstract:
The number of power amplifiers required to amplify a plurality of transmission signals is reduced by using non-linear transmission lines (NTL) circuits. In general, a “combining” NTL circuit is used to combine the plurality of transmission signals to form a soliton pulse. The soliton pulse is then amplified such that each of its component transmission signals are amplified. A “dividing” NTL circuit is then used to divide the amplified soliton pulse into its component amplified transmission signals. The amplified transmission signals can therefore be transmitted over a communications channel without requiring a separate power amplifier for each.

Real-Time Rejection Circuit To Automatically Reject Multiple Interfering Hopping Signals While Passing A Lower Level Desired Signal

US Patent:
4965581, Oct 23, 1990
Filed:
Jan 8, 1990
Appl. No.:
7/461943
Inventors:
William J. Skudera - Oceanport NJ
Stuart D. Albert - Bricktown NJ
Assignee:
The United States of America as represented by the Secretary of the Army - Washington DC
International Classification:
G01S 736
H04B 110
US Classification:
342 19
Abstract:
A real-time rejection circuit for passing low level desired signals in the resence of one or more strong, interfering signals. A chirp-Z transform system separates the various frequency components of a received signal into frequency segregated time domain signals. A power splitter separates the time domain signal into two paths. One path includes a modulator or switch that is normally biased "ON" for passing the time domain signal. The second path includes a diode detector that produces pulses of sufficient strength when a strong interfering component is present to override the bias and turn the modulator "OFF" for a sufficient period of time to attenuate the unwanted frequency components in the other path. The modulator output will primarily contain the low level desired frequency components that are passed through an inverse transform device for producing a frequency domain signal of the desired signal uncorrupted by unwanted signals.

Soliton Rejection Filter

US Patent:
5495253, Feb 27, 1996
Filed:
Nov 17, 1994
Appl. No.:
8/340926
Inventors:
Stuart D. Albert - Bricktown NJ
William J. Skudera - Oceanport NJ
Assignee:
The United States of America as represented by the Secretary of the Army - Washington DC
International Classification:
G01S 734
US Classification:
342159
Abstract:
A soliton rejection filter circuit is provided, for use in RF signal procing, for isolating a low level signal in the presence of stronger nearby interfering signals and detecting its modulation over a wide communication bandwidth centered at a relatively low RF frequency. The soliton filter circuit includes a nonlinear transmission line and a filter circuit.

Wide Dynamic Range Detection Circuit

US Patent:
5424674, Jun 13, 1995
Filed:
Nov 18, 1992
Appl. No.:
7/977942
Inventors:
William J. Skudera - Oceanport NJ
Elio A. Mariani - Hamilton Square NJ
Stuart D. Albert - Bricktown NJ
Assignee:
The United States of America as represented by the Secretary of the Army - Washington DC
International Classification:
H04B 110
US Classification:
327552
Abstract:
Two wide dynamic range detection circuits are disclosed, which are capable of detecting low-level desired signals in the presence of nearby strong interfering signals. Each circuit includes an attenuator scheme for attenuating the interfering signal while passing the desired signal. The first attenuator scheme uses a YIG filter in combination with an automatic gate arrangement. The second attenuator scheme uses a two-channel arrangement. The first channel uses a chirp-Z processor to derive a pulse-type transform signal in response to the strong interference signal. The second channel includes a YIG filter followed by a programmable notch filter which is controlled by the interference-signal pulse from the first channel. Following the programmable notch filter in the second channel is a chirp-Z processor followed by a gate arrangement wherein the gates are switched "OFF" under control of the interference-signal pulse from the first channel.

Apparatus For Real Time Interference Signal Rejection

US Patent:
5355091, Oct 11, 1994
Filed:
May 21, 1992
Appl. No.:
7/886203
Inventors:
Stuart D. Albert - Bricktown NJ
William J. Skudera - Oceanport NJ
Assignee:
The United States of America as represented by the Secretary of the Army - Washington DC
International Classification:
H04B 110
G01S 736
US Classification:
328167
Abstract:
Disclosed is a real time interference signal rejection circuit which utils a conventional chirp-Z analyzer to generate a critical number and stop a counter circuit. The critical number is then read by a microprocessor which calculates new tap values from a set of predetermined tap values to reprogram a programmable filter.

Isbn (Books And Publications)

On The Endings Of Wars

Author:
Stuart Albert
ISBN #:
0804692408

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