BackgroundCheck.run
Search For

Alexei N Shkidt, 6136801 Papaya St, Newark, CA 94560

Alexei Shkidt Phones & Addresses

36801 Papaya St, Newark, CA 94560    510-7457431   

Vallejo, CA   

Sunnyvale, CA   

Washoe, NV   

Fremont, CA   

Mentions for Alexei N Shkidt

Publications & IP owners

Us Patents

Standby Regulator

US Patent:
7705575, Apr 27, 2010
Filed:
Apr 10, 2009
Appl. No.:
12/421739
Inventors:
Ahmet Akyildiz - Saratoga CA, US
Alexei Shkidt - Newark CA, US
Assignee:
SpectraLinear, Inc. - Santa Clara CA
International Classification:
G05F 1/40
G05F 1/10
US Classification:
323281, 323274, 323284, 327544
Abstract:
A standby regulator circuit includes a standby bias circuit and a standby operational amplifier. The standby regulator circuit provides a standby regulated control voltage to a multiplexer. A regular operational amplifier provides a regulated control voltage to the multiplexer. During regular operation, the multiplexer selects the regular operational amplifier and selects the standby regulator circuit in a low-power mode. The multiplexer couples to a native pass transistor gate having a threshold voltage about equal to 0 V. The native pass transistor provides a regulated output voltage with relatively low-level input control voltages. In low-power mode, a power-down signal, provided to the multiplexer, smoothly transitions regulated control voltage from the regular operational amplifier to regulated control voltage sourcing from the standby operational amplifier. In low-power operation regular operational amplifier power is saved and the standby operational amplifier is appropriate for regulating the low threshold voltage native pass transistor.

Rail-To-Rail Operational Amplifier

US Patent:
7863981, Jan 4, 2011
Filed:
Apr 1, 2009
Appl. No.:
12/416459
Inventors:
Alexei Shkidt - Newark CA, US
Omer Fatih Orberk - Istanbul, TR
Assignee:
Spectra Linear, Inc. - Santa Clara CA
International Classification:
H03F 3/45
US Classification:
330255, 330253
Abstract:
A rail-to-rail operational amplifier has a pair of input terminals and an output terminal, and includes first and second parallel-connected differential input stages configured to generate a differential output signal OUTN, OUTP in response to a differential input signal VINN, VINP received at the pair of input terminals. Each of the first and second differential input stages in turn includes a pair of source-follower transistors and a pair of bulk-driven transistors. The pair of source-follower transistors are respectively coupled between the pair of input terminals and a bulk terminal of the pair of bulk-driven input transistors. Further, the pair of source-follower transistors in the first differential input stage have a different threshold voltage than the source-follower transistors in the second differential input stage.

Replica-Bias Automatic Gain Control

US Patent:
7863989, Jan 4, 2011
Filed:
Mar 10, 2009
Appl. No.:
12/400999
Inventors:
Omer Fatih Orberk - Istanbul, TR
Alexei Shkidt - Newark CA, US
Assignee:
Spectra Linear, Inc. - Santa Clara CA
International Classification:
H03L 7/00
US Classification:
331 15, 331109, 331158, 331182, 331183, 331185, 331186
Abstract:
A gain control system comprises a reference stage, a bias replication stage, an operational amplifier, an automatic gain control block, a gain stage, and a crystal oscillator in one embodiment. A negative feedback loop is formed by portions of the operational amplifier, the replica biasing stage, the gain stage, and the automatic gain control stage. The negative feedback loop operatively controls an amplitude of oscillation in the crystal oscillator. The automatic gain control block produces output currents at reference levels in proportion to an input current source. The output current reference levels provide a corresponding yet independent scaling of currents in the bias replication stage and the gain stage. By the scaling capabilities provided a high common mode of voltage is provided between the crystal oscillator and the voltage reference section while stable oscillating characteristics are provided over a broad frequency range.

Power-On Reset Circuit

US Patent:
7876135, Jan 25, 2011
Filed:
Mar 2, 2009
Appl. No.:
12/395781
Inventors:
Alexei Shkidt - Newark CA, US
Assignee:
Spectra Linear, Inc. - Santa Clara CA
International Classification:
H03L 7/00
US Classification:
327143, 327142
Abstract:
A power-on reset circuit produces a reset signal output configured by an upper trip-point in an input hysteresis characteristic of the circuit. The upper trip-point is configured by resistances of a first pair of resistors coupled in series at an internal voltage reference node. A temperature coefficient of the upper trip-point is configured by resistance values of a second pair of resistors where each resistor is coupled with a corresponding switching device with an associated switching threshold. A magnitude of the input hysteresis characteristic is configured by resistances of a third pair of resistors in series. The magnitude of hysteresis is configured independent of configuring either the level or the temperature coefficient of the upper trip-point.

Voltage-Controlled Oscillator Topology

US Patent:
8054139, Nov 8, 2011
Filed:
Feb 18, 2009
Appl. No.:
12/388086
Inventors:
Francisco Fernandez - San Jose CA, US
Alexei Shkidt - Newark CA, US
Assignee:
Silicon Labs Spectra, Inc. - Sunnyvale CA
International Classification:
H03K 3/03
US Classification:
331 57, 331185
Abstract:
A voltage-controlled oscillator is implemented with a succession of delay cells coupled in series to form an oscillator loop. The oscillator loop is supplied with reference voltages produced by a voltage generator. The reference voltages produce stable operation of the voltage-controlled oscillator. Cascode reference current generators are incorporated within the voltage generator to supply a cross-coupled arrangement of pull-up devices within each delay cell. The cross-coupled pull-up devices are instrumental in producing complementary output signaling from each delay cell. A pair of cascode current generators is configured in parallel to produce a magnitude of current according to an applied voltage and to be selectable for dual or single operation with a corresponding frequency determination.

Calibrated Transfer Rate

US Patent:
8112576, Feb 7, 2012
Filed:
Apr 10, 2009
Appl. No.:
12/421682
Inventors:
Alexei Shkidt - Newark CA, US
Aysel Yildiz Okyay - Istanbul, TR
Gregory Jon Richmond - Cupertino CA, US
Assignee:
Silicon Labs Spectra, Inc. - Sunnyvale CA
International Classification:
G06F 13/38
US Classification:
711103, 711154, 710 14, 710 33, 331 44
Abstract:
Methods, systems, and devices are described for the implementation of a novel architecture to support a calibrated rate for the transfer of circuit configuration data. Sets of configuration data from a memory may be transferred to volatile memory to support reconfigurable circuit elements, for example, for use in a clock generator. Upon system power-up, there may be a default speed for the transfer of the configuration data. Techniques are described to first transfer calibration data upon power-up; the transferred calibration data may then be used to set an accelerated speed for a remaining portion of the transfer.

Methods, Systems, And Devices For Power-On Sequence For A Circuit

US Patent:
8179111, May 15, 2012
Filed:
Apr 10, 2009
Appl. No.:
12/421685
Inventors:
Ahmet Akyildiz - Saratoga CA, US
Alexei Shkidt - Newark CA, US
Gregory Jon Richmond - Cupertino CA, US
Assignee:
Silicon Labs Spectra, Inc. - Sunnyvale CA
International Classification:
G05F 1/10
US Classification:
323283
Abstract:
Methods, systems, and devices are described for a power-on sequence for a circuit. A sequence generator for an electronic system may control various power domains to enter known states and prevent unwanted states as other domains of the system power-up. Regulator modules may be controlled to remain in an inoperable state until a reference voltage stabilizes at a predetermined reference level. The regulator modules regulate a received voltage supply to output a regulated voltage at the reference level, the regulated voltage set via a comparison to the reference voltage. Various analog and digital modules may be controlled to remain in an known state until the regulated voltage stabilizes at substantially the reference level. Additional sequencing is described for other dependencies, as well.

Extended Range Oscillator

US Patent:
2009022, Sep 10, 2009
Filed:
Mar 2, 2009
Appl. No.:
12/395854
Inventors:
Omer Fatih Orberk - Istanbul, TR
Alexei Shkidt - Newark CA, US
Assignee:
SpectraLinear, Inc. - Santa Clara CA
International Classification:
H03L 5/00
US Classification:
331183
Abstract:
Embodiments provide systems and methods for supporting reliable operation of crystals with widely varying fundamental modes of oscillation. In accordance with exemplary embodiments, an architecture is disclosed for an oscillator circuit which allows reliable operation for crystals varying over a wide frequency range, such as 12:1. Some embodiments use selectable current sources to provide variable range control for extending the range of frequencies over which the embodiments may operate properly. Other embodiments include symmetric topologies, cascode topologies, coupling elements, and/or other techniques to improve noise immunity and/or operation in low-source-voltage environments.

NOTICE: You may not use BackgroundCheck or the information it provides to make decisions about employment, credit, housing or any other purpose that would require Fair Credit Reporting Act (FCRA) compliance. BackgroundCheck is not a Consumer Reporting Agency (CRA) as defined by the FCRA and does not provide consumer reports.