Alfred K Wong, 54Wayland, MA

6961186, Nov 1, 2005

Sep 26, 2003

10/672620

Christophe Pierrat - Santa Clara CA, US
Alfred Kwok-Kit Wong - Brookline MA, US

Takumi Technology Corp. - Sunnyvale CA

G02B009/00

359649, 359754

Improvements in the fabrication of integrated circuits are driven by the decrease of the size of the features printed on the wafers. Current lithography techniques limits have been extended through the use of phase-shifting masks, off-axis illumination, and proximity effect correction. More recently, liquid immersion lithography has been proposed as a way to extend even further the limits of optical lithography. This invention described a methodology based on contact printing using a projection lens to define the image of the mask onto the wafer. As the imaging is performed in a solid material, larger refractive indices can be obtained and the resolution of the imaging system can be increased.

7055127, May 30, 2006

Oct 27, 2003

10/694474

Christophe Pierrat - Santa Clara CA, US
Alfred K. Wong - Brookline MA, US

Takumi Technology Corp. - Sunnyvale CA

G06F 17/50

716 19, 716 21

The manufacturing of integrated circuits relies on the use of optical proximity correction (OPC) to correct the printing of the features on the wafer. The data is subsequently fractured to accommodate the format of existing mask writer. The complexity of the correction after OPC can create some issues for vector-scan e-beam mask writing tools as very small slivers are created when the data is converted to the mask write tool format. Moreover the number of shapes created after fracturing is quite large and are not related to some important characteristics of the layout like for example critical areas. A new technique is proposed where the order of the OPC and fracturing steps is reversed. The fracturing step is done first in order to guarantee that no slivers are created and that the number of shapes is minimized. The shapes created can also follow the edges of critical zones so that critical and non-critical edges can be differentiated during the subsequent OPC step.

7155689, Dec 26, 2006

Oct 7, 2003

10/680592

Christophe Pierrat - Santa Clara CA, US
Alfred K. Wong - Brookline MA, US

Magma Design Automation, Inc. - Santa Clara CA

G06F 17/50

716 4, 716 5, 716 19

Subtleties of advanced fabrication processes and nano-scale phenomena associated with integrated circuit miniaturization have exposed the insufficiencies of design rules. Such inadequacies have adverse impact on all parts of the integrated circuit creation flow where design rules are used. In addition, segregation of the various layout data modification steps required for deep sub-micrometer manufacturing are resulting in slack and inefficiencies. This invention describes methods to improve integrated circuit creation via the use of a unified model of fabrication processes and circuit elements that can complement or replace design rules. By capturing the interdependence among fabrication processes and circuit elements, the unified model enables efficient layout generation, resulting in better integrated circuits.

7434188, Oct 7, 2008

Mar 9, 2006

11/372557

Anirudh Devgan - Austin TX, US
Roderick Metcalfe - Farnham, GB
Vivek Raghavan - Mountain View CA, US
Alfred Wong - Brookline MA, US

Magma Design Automation, Inc. - San Jose CA

G06F 17/50

716 10, 716 9

A system and a method are disclosed for integrating the results of lithographic simulation into the physical synthesis process. The effects of lithographic variation are considered when selecting a cell from among a group of cells having equivalent function. Circuit design elements are placed and routed with consideration of the effects of lithographic variation on robustness, timing performance, and leakage current. Cells may be simulated under a variety of conditions and environments and the simulation results stored in a library for efficient lithographically optimized placements.

7614033, Nov 3, 2009

May 26, 2006

11/442110

Christophe Pierrat - Santa Clara CA, US
Alfred Kwok-Kit Wong - Brookline MA, US

Takumi Technology Corp. - Santa Clara CA

G06F 17/50

716 21, 716 7, 716 11, 716 19

The manufacturing of integrated circuits relies on the use of optical proximity correction (OPC) to correct the printing of the features on the wafer. The data is subsequently fractured to accommodate the format of existing mask writer. The complexity of the correction after OPC can create some issues for vector-scan e-beam mask writing tools as very small slivers are created when the data is converted to the mask write tool format. Moreover the number of shapes created after fracturing is quite large and are not related to some important characteristics of the layout like for example critical areas. A new technique is proposed where the order of the OPC and fracturing steps is reversed. The fracturing step is done first in order to guarantee that no slivers are created and that the number of shapes is minimized. The shapes created can also follow the edges of critical zones so that critical and non-critical edges can be differentiated during the subsequent OPC step.

7932020, Apr 26, 2011

Jul 10, 2003

10/616603

Christophe Pierrat - Santa Clara CA, US
Alfred K. Wong - Brookline MA, US

Takumi Technology Corporation - Santa Clara CA

G21K 5/10

430396, 430311, 2504922, 25049222

Improvements in the fabrication of integrated circuits are driven by the decrease of the size of the features printed on the wafers. Current lithography techniques limits have been extended through the use of phase-shifting masks, off-axis illumination, and proximity effect correction. More recently, liquid immersion lithography has been proposed as a way to extend even further the limits of optical lithography. This invention described a methodology based on contact or proximity printing using a projection lens to define the image of the mask onto the wafer. As the imaging is performed in a solid material, larger refractive indices can be obtained and the resolution of the imaging system can be increased.

8473876, Jun 25, 2013

Jul 20, 2007

11/781054

Emre Tuncer - Santa Cruz CA, US
Hui Zheng - Round Rock TX, US
Vivek Raghavan - Mountain View CA, US
Anirudh Devgan - Austin TX, US
Amir Ajami - Sunnyvale CA, US
Alessandra Nardi - Hayward CA, US
Tao Lin - Sunnyvale CA, US
Pramod Thazhathethil - Bangalore, IN
Alfred Wong - Brookline MA, US

Synopsys, Inc. - Mountain View CA

G06F 17/50

716 54, 716 51, 716 55, 716113

A method for performing timing analysis includes receiving information specifying an integrated circuit. A neighborhood of shapes associated with the integrated circuit is then determined. Delay information associated with the integrated circuit is generated based on the neighborhood of shapes. The neighborhood of shapes may be determined by determining a first set of spacings to a boundary of a first cell from an internal shape. A second set of spacings may be determined from the boundary of the first cell to a shape of a second cell. A lithography process may be characterized using the first and second set of spacings.

8572523, Oct 29, 2013

Jul 20, 2007

11/781043

Emre Tuncer - Santa Cruz CA, US
Hui Zheng - Round Rock TX, US
Vivek Raghavan - Mountain View CA, US
Anirudh Devgan - Austin TX, US
Amir Ajami - Sunnyvale CA, US
Alessandra Nardi - Hayward CA, US
Tao Lin - Sunnyvale CA, US
Pramod Thazhathethil - Bangalore, IN
Alfred Wong - Brookline MA, US

Synopsys, Inc. - Mountain View CA

G06F 17/50

716 55, 716 52, 716 53, 716 54, 716112, 716113, 716133, 716134, 716136, 703 16

A method for performing leakage analysis includes receiving information specifying an integrated circuit. A neighborhood of shapes associated with the integrated circuit is then determined. Leakage information associated with the integrated circuit is generated based on the neighborhood of shapes. The neighborhood of shapes may be determined by determining a first set of spacings to a boundary of a first cell from an internal shape. A second set of spacings may be determined from the boundary of the first cell to a shape of a second cell. A lithography process may be characterized using the first and second set of spacings.