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Brian D Cheung, 471244 Strickland Dr, Austin, TX 78748

Brian Cheung Phones & Addresses

Austin, TX   

Dallas, TX   

Menlo Park, CA   

Redwood City, CA   

Sunnyvale, CA   

Milpitas, CA   

San Jose, CA   

1244 Strickland Dr, Austin, TX 78748   

Work

Company: University of california - Davis, CA 2013 Position: Economics tutor

Education

School / High School: University of California- Davis, CA Mar 2014 Specialities: Bachelor of Arts in Economics

Skills

Languages: English & Cantonese Chinese (Fluent) • Mandarin Chinese (Basic) IT Skills: MS Office (Word • Excel) • PowerPoint • STATA • Mathematica Interests: Foreign Exchange • Marketing • Business Startup • basketball • Swimming • Web Searching

Ranks

Licence: New York - Currently registered Date: 2006

Mentions for Brian D Cheung

Career records & work history

Lawyers & Attorneys

Brian Cheung Photo 1

Brian Wan Hung Cheung - Lawyer

Address:
416-2269683 (Office)
Licenses:
New York - Currently registered 2006
Education:
London School of Economics
Brian Cheung Photo 2

Brian Cheung - Lawyer

ISLN:
920091959
Admitted:
2006
University:
London School of Economics; London School of Economics

Brian Cheung resumes & CV records

Resumes

Brian Cheung Photo 44

Phd Candidate

Location:
13 Lawrence Dr, Princeton, NJ 08540
Industry:
Biotechnology
Work:
Princeton University
Phd Candidate
Case Western Reserve University Sep 2012 - May 2013
Peer Tutor
Case Western Reserve University Sep 2012 - May 2013
Teaching Assistant
The University of Alabama May 2012 - Jul 2012
Reu Student
Education:
Rice University 2013 - 2016
Bachelors, Bachelor of Arts, Applied Mathematics
Rice University 2013 - 2015
Bachelors, Bachelor of Science, Bioengineering
Case Western Reserve University 2011 - 2015
Bachelors, Bachelor of Science, Medical Engineering
Skills:
Matlab, Java, Data Analysis, Research, Image Analysis, Translation, Fluorescence Microscopy, English Chinese, Neuroscience
Languages:
English
Mandarin
Brian Cheung Photo 45

Managing Director

Location:
2817 west End Ave, Nashville, TN 37203
Industry:
Marketing And Advertising
Work:
Ecommerce and Digital Marketing Consulting - O2M2 - Hong Kong since Jun 2012
Executive Marketing and Ecommerce Leader
CheapCaribbean.com - Dallas, TX Aug 2011 - Jul 2012
Director of Marketing
BSG Billing Services Group - San Antonio, Texas Area Jun 2010 - Jul 2011
Director, Interactive Marketing and E-Commerce
HDVMS - True.com - Dallas/Fort Worth Area Jun 2004 - Jun 2010
Director of Marketing, Performance
Third Eye Promotions - Austin, Texas Area 2003 - 2004
Search Engine Optimization Manager
Self-employed - Austin, Texas Area 2002 - 2003
Independant Marketing Consultant
Quinstreet Inc. - San Francisco Bay Area Dec 2000 - Jan 2002
Systems Engineer - Ad Server
Education:
Texas State University-San Marcos 1996 - 2000
BBA, Management Information Systems
Skills:
Sem, Email Marketing, E Commerce, Online Advertising, Online Marketing, Seo, Digital Marketing, Multi Channel Marketing, Lead Generation, Advertising, Analytics, Digital Media, Google Analytics, Crm, Marketing, Internet Strategy, Marketing Strategy, Business Development, Product Management, Integrated Marketing, Affiliate Marketing, Return on Investment, Strategy, Digital Strategy, Search Engine Marketing, Wireframing, Consulting, Enterprise Software, Web Analytics, Mobile Devices, Direct Marketing, Interactive Marketing, Customer Acquisition, Media Buying, Landing Page Optimization, Product Development, Conversion Optimization, Search Engine Optimization, Marketing Automation, Funnel Optimization, Display Advertising, A/B Testing, Programmatic Media Buying, Customer Segmentation Strategy, Financial Modeling, Start Ups, Project Management, Creative Optimization, User Experience Testing, Social Media Marketing
Interests:
E Commerce
Technology
Management Consulting/Contracting
Business Networking
New Business Opportunities
Digital Media
Social Commerce
Education
Fitness
Advertising
Strategic Planning
Food and Beverages
Consumer Goods
Fashion
Enterprise Software
Green Consumer Goods
Online Dating
Saas
Online Travel
Investing
Traveling
Languages:
English
Mandarin
Certifications:
Inbound Marketing Certification
Google Adwords Certification
Google Analytics Certification
Inbound Certification
Brian Cheung Photo 46

Software Engineering Intern

Location:
Austin, TX
Work:
Google May 2020 - Aug 2020
Software Engineering Intern
Citadel Securities May 2020 - Aug 2020
Software Engineering Intern
Education:
The University of Texas at Austin
Bachelors
Brian Cheung Photo 47

Brian Cheung

Location:
United States
Brian Cheung Photo 48

Brian Cheung - San Francisco, CA

Work:
University of California - Davis, CA 2013 to 2014
Economics Tutor
University of California - Davis, CA 2012 to 2014
Volunteer Math Tutor
University of California - Davis, CA 2013 to 2013
Research Assistant - Economics and Finance Department
Family's Seafood Restaurant - San Francisco, CA 2012 to 2012
Front Desk Client Services Representative
Family's Seafood Restaurant - Hong Kong, Hong Kong Island 2008 to 2012
Accountant & Waiter
Education:
University of California - Davis, CA Mar 2014
Bachelor of Arts in Economics
Skills:
Languages: English & Cantonese Chinese (Fluent), Mandarin Chinese (Basic) IT Skills: MS Office (Word, Excel), PowerPoint, STATA, Mathematica Interests: Foreign Exchange, Marketing, Business Startup, basketball, Swimming, Web Searching

Publications & IP owners

Us Patents

De-Glitch Circuit

US Patent:
7557643, Jul 7, 2009
Filed:
Mar 15, 2007
Appl. No.:
11/686828
Inventors:
Darmin Jin - Fremont CA, US
Brian Cheung - San Bruno CA, US
Assignee:
SanDisk Corporation - Milpitas CA
International Classification:
H03K 5/00
US Classification:
327551, 327 34
Abstract:
A digital logic circuit and method for de-glitching an input signal. The circuit removes distortion that occurs during a “de-glitching” time period that follows each transition of the input signal from 0 to 1 or from 1 to 0. The circuit can remove such distortion from the input signal without substantially delaying the input signal. Specifically, the delay interposed can be much less than the duration of the de-glitching time period. One embodiment includes first and second Set-Reset flip-flops each having an input connected to receive the input signal and having an output connected to a majority circuit. A delay circuit also receives the input signal and provides an output to the majority circuit. Other embodiments replace the majority circuit with a circuit including logic gates.

Systems, Modules, Chips, Circuits And Methods With Delay Trim Value Updates On Power-Up

US Patent:
7804371, Sep 28, 2010
Filed:
Dec 31, 2007
Appl. No.:
11/967467
Inventors:
Stan Chapski - Saratoga CA, US
Darmin Jin - Fremont CA, US
Brian Cheung - San Bruno CA, US
Assignee:
SanDisk Corporation - Milpitas CA
International Classification:
G01R 23/00
US Classification:
331 44, 331 57
Abstract:
Timing measurement is performed by a digital oscillator, using a calibration value which is calculated after chip fabrication is completed, and automatically loaded into selection logic at powerup.

Integrated Circuits And Methods With Two Types Of Decoupling Capacitors

US Patent:
7898013, Mar 1, 2011
Filed:
Dec 31, 2007
Appl. No.:
11/967778
Inventors:
Brian Cheung - San Bruno CA, US
Emmanuel De Muizon - Fremont CA, US
Assignee:
SanDisk Corporation - Milpitas CA
International Classification:
H01L 29/94
US Classification:
257296, 257207, 257297, 257300, 257E29345, 257E2707
Abstract:
Methods and systems for optimal decoupling capacitance in a dual-voltage power-island architecture. In low-voltage areas of the chip, accumulation capacitors of two different types are used for decoupling, depending on whether the capacitor is located in an area which is always-on or an area which is conditionally powered.

Systems, Circuits, Chips And Methods With Protection At Power Island Boundaries

US Patent:
8072719, Dec 6, 2011
Filed:
Dec 31, 2007
Appl. No.:
11/967382
Inventors:
Darmin Jin - Fremont CA, US
Brian Cheung - San Bruno CA, US
Steve Skala - Fremont CA, US
Assignee:
SanDisk Technologies Inc. - Plano TX
International Classification:
H02H 9/00
H01C 7/12
H02H 1/00
H02H 1/04
H02H 3/22
H02H 9/06
US Classification:
361 56, 361118
Abstract:
Integrated circuits where the standard isolation cell, at power island boundaries, also includes a protection device, which clamps transient voltages.

Connection Between An I/O Region And The Core Region Of An Integrated Circuit

US Patent:
8304813, Nov 6, 2012
Filed:
Jan 8, 2007
Appl. No.:
11/651614
Inventors:
Paul Lassa - Cupertino CA, US
Paul Paternoster - Los Altos CA, US
Brian Cheung - San Bruno CA, US
Assignee:
SanDisk Technologies, Inc. - Plano TX
International Classification:
H01L 27/118
US Classification:
257203, 257E2711
Abstract:
A connection between a first circuit within an I/O region of an integrated circuit chip and a second circuit within a core region of the chip. The first circuit is connected to a bonding pad through a first conductor in a first layer of an I/O region. The second circuit is connected to the bonding pad through a second conductor in a second layer of an I/O region above the first layer.

Photovoltaic Panel Fastening System

US Patent:
2013009, Apr 18, 2013
Filed:
Oct 14, 2011
Appl. No.:
13/273284
Inventors:
Luc DuPont - Berkeley CA, US
Brian C. Cheung - San Francisco CA, US
Assignee:
A. Raymond et Cie - Grenoble
International Classification:
E04D 13/18
F24J 2/52
US Classification:
521733, 5274521
Abstract:
A fastening system is provided. In another aspect, a hook fastens a photovoltaic panel assembly to a building roof. Another aspect employs catches that removeably attach an auxiliary component, such as a solar panel frame, to a building in hinge and slide motions for engagement of the catches. A method of installing a fastening system is additionally provided.

Solar Panel Securing System

US Patent:
2013019, Aug 1, 2013
Filed:
Jan 27, 2012
Appl. No.:
13/359944
Inventors:
Luc DuPont - Berkeley CA, US
Brian C. Cheung - San Francisco CA, US
Assignee:
A. Raymond et Cie - Grenoble
International Classification:
E04D 13/18
E04B 1/38
US Classification:
521733, 5274521
Abstract:
A solar panel securing system is provided. In another aspect, a solar or photovoltaic panel assembly is mounted to a building roof in a screw-free manner. Another aspect employs a snap-in connection between a member pre-assembled to a solar panel and a roof-mounted bracket. A further aspect adhesively bonds a bracket directly to a glass surface of a solar panel. A method of securing a solar panel is additionally provided.

Apparatus And Method For High Voltage Switches

US Patent:
2013030, Nov 14, 2013
Filed:
May 10, 2012
Appl. No.:
13/468957
Inventors:
Darmin Jin - Fremont CA, US
William Chau - San Jose CA, US
Brian Cheung - San Bruno CA, US
Assignee:
SANDISK TECHNOLOGIES INC. - Plano TX
International Classification:
H03L 5/00
H03K 17/56
US Classification:
327333, 327419
Abstract:
Apparatus and method for coupling high voltages for a semiconductor device via high voltage switches are disclosed. A high voltage switch includes a switch and a level shifter. The switch is defined between a voltage source and a voltage output. An enable line is coupled to a first transistor of the switch. The level shifter includes an input and an output. A characterization line is coupled to the input of the level shifter and the output of the level shifter is coupled to a second transistor of the switch. The level shifter further includes a power rail that is coupled to the switch between the first transistor and the second transistor.

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