Brian A Watson, 461243 W Beverly Pl, Tracy, CA 95376

7568189, Jul 28, 2009

Apr 26, 2007

11/740636

Victor Suba - Foster City CA, US
Brian Watson - Foster City CA, US

Sony Computer Entertainment Inc. - Tokyo

G06F 9/45

717145

An emulator uses code translation and recompilation to execute target computer system applications on a host computer system. Target application code is partitioned into target application code blocks, and related target application code blocks are combined into block groups and translated. Translated application code block groups are sized to comply with restrictions on branch instruction size. Upon selecting an application code block group for execution, a cache tag is used to determine if a corresponding translated code block group is available and valid. If not, the block group is translated and executed. Sequentially executed translated code blocks are located in adjacent portions of memory to improve performance when switching between translated code blocks. The emulator may use a link register of the host computer system to prefetch instructions and data from translated code blocks. The emulator also takes into account structural hazards in translating instructions.

7689868, Mar 30, 2010

Jun 22, 2007

11/767399

Brian Watson - Burlingame CA, US

Sony Computer Entertainment Inc. - Foster City CA

G06F 11/00

714 34, 714 38, 717124, 717129

A method for debugging includes interacting with a memory management component to force an interrupt upon access to one or more memory locations during software execution, and in response to the forced interrupt, saving information regarding the execution of the software, and interacting with the memory management component to disable the interrupt upon access to the one or more memory locations during software execution.

7770050, Aug 3, 2010

Apr 4, 2007

11/696699

Stewart Sargaison - Foster City CA, US
Victor Suba - Foster City CA, US
Brian Watson - Burlingame CA, US

Sony Computer Entertainment Inc. - Tokyo

G06F 1/04

713600, 713400, 703 26

Methods and systems for resolving clock management issues in emulation of a target system on a host system are disclosed. A first set of code instructions of a target program is interpreted to generate interpreted code instructions that emulate a first component on the host system. A second set of code instructions is translated to generate translated code instructions that emulate a second component of the target system on the host system. The interpreted instructions, are executed based on a first clock (which may be a fixed clock) and the translated instructions are executed based on a second clock (which may be a variable clock). The host system adjusts the first or second clock, execution of the translated or interpreted instructions or a memory access to maintain a desired synchronization between the translated instructions and the interpreted instructions.

8073676, Dec 6, 2011

Sep 19, 2008

12/234325

Stewart Sargaison - Foster City CA, US
Brian Watson - Burlingame CA, US
Simon Booth - Burlingame CA, US
Victor Octav Suba Miura - Foster City CA, US
Bret Mogilefsky - Castro Valley CA, US

Sony Computer Entertainment Inc. - Tokyo

G06F 9/455

703 27

An emulation enhancement method in a first video game platform for enhancing execution of video games written for a second video game platform includes receiving an input signal written for the second video game platform, analyzing the input signal written for the second video game platform, intercepting a control signal from the input signal based on a set criteria, enhancing the control signal to generate an enhanced control signal for the first video game platform, and outputting the enhanced control signal. The control signal carries an audio effect component, a video effect component and a haptic effect component that are outputted on a user output display. Enhancing the control signal augments the audio effect component and the video effect component of the control signal and generates the enhanced control signal that utilizes additional platform capabilities on the first video game platform.

8141090, Mar 20, 2012

Apr 24, 2007

11/789411

Sven Graupner - Mountain View CA, US
Akhil Sahai - Santa Clara CA, US
Vijay Machiraju - Hyderabad, IN
James C. Pruyne - Naperville IL, US
Keith Farkas - San Carlos CA, US
Subramoniam N. Iyer - Newark CA, US
Brian J. Watson - Chesapeake VA, US

Hewlett-Packard Development Company, L.P. - Houston TX

G06F 9/46
G06F 9/455
G06F 15/173

718104, 718 1, 718105, 709225, 709226

Resources are provisioned in an automated manner for shared services in a resource-on-demand system. A model representing an observed state of resources in the resource-on-demand system allocated to the shared services and a model representing a desired state of the shared services are stored. At least one policy applicable to provisioning the resources for the shared services is determined. The policy and information from the models are applied to automatically provision the resources for satisfying the desired state of the shared services.

8166131, Apr 24, 2012

Sep 19, 2008

12/234088

Stewart Sargaison - Foster City CA, US
Brian Watson - Burlingame CA, US
Simon Booth - Burlingame CA, US
Victor Octav Suba Miura - Foster City CA, US

Sony Computer Entertainment Inc. - Tokyo

G06F 15/16
G06F 9/445

709217, 717177

A system and method for preparing entertainment software for reduced network delivery time includes analyzing entertainment software to identify a first stage implementing a subset of the functionality of the entertainment software such that the first stage is deliverable to an entertainment platform across a network more quickly than the delivery of the entire entertainment software, and preparing the identified first stage for download, such that the identified first stage may be downloaded and used on the entertainment platform.

8219722, Jul 10, 2012

Dec 1, 2010

12/958138

Victor Suba - Foster City CA, US
Stewart Sargaison - Foster City CA, US
Brian Watson - Foster City CA, US

Sony Computer Entertainment Inc. - Tokyo

G06F 13/28
G06F 15/167
G06F 12/00
G06F 13/00
G06F 9/26
G06F 9/34

710 22, 709212, 711118, 711137, 711207

An emulator schedules emulation threads for DMA emulation and other emulation functions in a time-multiplexed manner. Emulation threads are selected for execution according to a load balancing scheme. Non-DMA emulation threads are executed until their execution time period expires or they stall. DMA emulation thread execution is allowed to execute indefinitely until the DMA emulation thread stalls. The DMA emulation thread prefetches additional adjacent data in response to target computer system DMA requests. Upon receiving a target computer system DMA request, the DMA emulation thread first checks to the prefetched data to see if this data matches the request. If so, the request is fulfilled using the prefetched data. If the prefetched data does not match the target computer system DMA request, the DMA emulation thread fetches and stores the requested data and additional adjacent data for potential future use.

8234514, Jul 31, 2012

Jul 12, 2010

12/834756

Stewart Sargaison - Foster City CA, US
Victor Suba - Foster City CA, US
Brian Watson - Burlingame CA, US

Sony Computer Entertainment Inc. - Tokyo

G06F 1/04

713600, 713400, 703 26

Methods and systems for resolving clock management issues in emulation of a target system on a host system are disclosed. A first set of code instructions of a target program is emulated to generate a first set of emulated instructions that emulate a first component on the host system. A second set of code instructions is emulated to generate a second set of emulated instructions that emulate a second component of the target system on the host system. The first set is executed based on a first clock (which may be a fixed clock) and the second set is executed based on a second clock (which may be a variable clock). The host system adjusts the first or second clock, execution of the first or second sets of instructions or a memory access to maintain a desired synchronization between the first and second sets of instructions.