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Casey L Hardy, 4450 Glendale St UNIT 206, San Francisco, CA 94114

Casey Hardy Phones & Addresses

San Francisco, CA   

South Lake Tahoe, CA   

San Diego, CA   

1802 Canyon Blvd APT 1, Boulder, CO 80302    415-4836324   

Santa Clara, CA   

Sunnyvale, CA   

Everett, WA   

Milton, WA   

Mentions for Casey L Hardy

Career records & work history

Lawyers & Attorneys

Casey Hardy Photo 1

Casey Hardy - Lawyer

ISLN:
923520280
Admitted:
2006

Casey Hardy resumes & CV records

Resumes

Casey Hardy Photo 31

Research Assistant

Location:
1802 Canyon Blvd, Boulder, CO 80302
Industry:
Research
Work:
University of Colorado Boulder
Research Assistant
Maxim Integrated Aug 2014 - May 2016
Analog Ic Design Contractor
Maxim Integrated May 2014 - Aug 2014
Analog Ic Design Intern
Apple Sep 2012 - Aug 2013
Audio Hw Systems Architect
Apple May 2010 - Sep 2012
Ipod Analog Electrical Engineer
Apple Mar 2007 - May 2010
Audio Electrical Engineer
Maxim Integrated 2004 - 2007
Applications Engineer
Outback Power Technologies Jun 2004 - Aug 2004
Electrical Engineer
National Institute of Standards and Technology Jun 2003 - Aug 2003
Research Fellow
Education:
University of Colorado Boulder 2016 - 2019
Doctorates, Doctor of Philosophy, Electronics, Electronics Engineering, Philosophy
San Francisco State University 2013 - 2015
Master of Science, Masters, Electronics Engineering
Santa Clara University 2007 - 2008
Stanford University 2005 - 2006
Western Washington University 1999 - 2004
Bachelors, Bachelor of Science, Electronics Engineering
Skills:
Embedded Systems, Pcb Design, Debugging, Mixed Signal, Analog, Sound, Semiconductors, Integrated Circuit Design, Electronics, Ic, Testing, Power Management, Cmos, Schematic Capture, Asic, Simulations, Application Specific Integrated Circuits, Integrated Circuits, Matlab, Electrical Engineering
Casey Hardy Photo 32

President And Chief Executive Officer

Work:
Lionsgate Disaster Relief
President and Chief Executive Officer
Casey Hardy Photo 33

Casey Hardy

Casey Hardy Photo 34

Casey Hardy

Casey Hardy Photo 35

Casey Hardy

Casey Hardy Photo 36

Casey Hardy

Casey Hardy Photo 37

Casey Hardy

Publications & IP owners

Us Patents

Invoking And Supporting Device Testing Through Audio Connectors

US Patent:
2013010, May 2, 2013
Filed:
Nov 1, 2011
Appl. No.:
13/286439
Inventors:
Dustin J. Verhoeve - San Francisco CA, US
Saket R. Vora - San Francisco CA, US
Erturk D. Kocalar - Sunnyvale CA, US
Casey Hardy - San Francisco CA, US
Brian J. Conner - San Jose CA, US
Adriane S. Niehaus - San Jose CA, US
International Classification:
H04R 29/00
G01R 31/3187
US Classification:
381 58, 3247503, 714727, 714E11001
Abstract:
Electronic devices may be provided with audio circuits and circuitry configured to support communications and test mode operations. During normal operation, a connector such as an audio connector may be inserted into a connector port in an electronic device. The audio connector may be associated with a headset or other accessory and may be used to carry audio signals. During test mode operations, a tester may be coupled to the connector port using an audio connector. The tester may generate voltages, resistances, time-varying signals, or other input that directs the device to configure switching circuitry to support testing. Monitoring circuitry in the device may be used to detect input from the tester. In response to detected input from the tester, the switching circuitry may be adjusted to couple a control circuit that supports test mode operations to the audio connector.

Connectors For Invoking And Supporting Device Testing

US Patent:
2013010, May 2, 2013
Filed:
Nov 1, 2011
Appl. No.:
13/286444
Inventors:
Erturk D. Kocalar - Sunnyvale CA, US
Dustin J. Verhoeve - San Francisco CA, US
Brian J. Conner - San Jose CA, US
Casey Hardy - San Francisco CA, US
Adriane S. Niehaus - San Jose CA, US
Saket R. Vora - San Francisco CA, US
International Classification:
H04R 29/00
G01R 31/3187
US Classification:
381 58, 3247503
Abstract:
Electronic devices may be provided with audio circuits and circuitry configured to support communications and test mode operations. During normal operation, a standards-compliant connector such as an audio connector may be inserted into a connector port in an electronic device. The audio connector may be associated with a headset or other accessory and may be used to carry audio signals. During test mode operations, a nonstandard test connector may be inserted into the connector port. The electronic device may detect the presence of the nonstandard connector and may direct the electronic device to operate in a testing mode.

Methods For Invoking Testing Using Reversible Connectors

US Patent:
2013010, May 2, 2013
Filed:
Nov 1, 2011
Appl. No.:
13/286448
Inventors:
Scott Mullins - Morgan Hill CA, US
Alexei Kosut - Mountain View CA, US
Brian J. Conner - San Jose CA, US
Dustin J. Verhoeve - San Francisco CA, US
Saket R. Vora - San Francisco CA, US
Erturk D. Kocalar - Sunnyvale CA, US
Casey Hardy - San Francisco CA, US
Adriane S. Niehaus - San Jose CA, US
International Classification:
H04R 29/00
G01R 31/3187
US Classification:
381 58, 3247503, 714727, 714E11001
Abstract:
Electronic devices may be provided with audio circuits and controller circuitry configured to support test mode operations. A connector such as a reversible connector may be inserted into a mating device connector in an electronic device. The reversible connector may be connected to the device connector in either a normal orientation or a reversed orientation in which the reversible connector is rotated 180 with respect to the normal orientation. During test mode operations, a tester may be coupled to the device connector using the reversible connector. The tester may generate voltages, resistances, time-varying signals, or other input that directs the device to configure switching circuitry to support testing. Monitoring circuitry in the device may be used to detect input from the tester. In response to detected input from the tester, the switching circuitry may be adjusted to couple the controller to the device connector.

Audio Jack With Ground Detect

US Patent:
2012008, Apr 5, 2012
Filed:
Sep 30, 2010
Appl. No.:
12/894587
Inventors:
Zheng Gao - San Jose CA, US
Nathan Johanningsmier - Cupertino CA, US
Casey Hardy - Cupertino CA, US
Eric Monsef - Los Gatos CA, US
Chiachi Wu - Taipei, TW
Assignee:
Apple Inc. - Cupertino CA
International Classification:
G01R 19/00
US Classification:
324 7611
Abstract:
Circuits, methods, and apparatus that provide an audio receptacle that can detect the presence of an audio jack without using mechanical switches or other such mechanical mechanisms. One example provides an audio receptacle having two contacts that may be electrically connected when an audio jack is inserted. When no audio jack is inserted into the audio receptacle, the two ground contacts may not be connected. When an audio jack is inserted into the audio receptacle, the resulting closed circuit may be detected and used to activate or otherwise turn on one or more audio circuits in or associated with the audio receptacle. Conversely, when no audio jack is inserted, the resulting open circuit may be detected and used to deactivate or otherwise turn off or reduce power in one or more audio circuits in or associated with the audio receptacle.

Voltage Regulation System For Memory Bit Cells

US Patent:
2020041, Dec 31, 2020
Filed:
Jul 13, 2020
Appl. No.:
16/926974
Inventors:
- Santa Clara CA, US
Stephen Victor Kosonocky - Ft. Collins CO, US
Casey Lee Hardy - Boulder CO, US
International Classification:
G11C 5/14
Abstract:
Systems, apparatuses, and methods for dynamically generating a memory bitcell supply voltage rail from a logic supply voltage rail are disclosed. A circuit includes at least one or more comparators, control logic, and power stage circuitry. The circuit receives a logic supply voltage rail and compares the logic supply voltage rail to threshold voltage(s) using the comparator(s). Comparison signal(s) from the comparator(s) are coupled to the control logic. The control logic generates mode control signals based on the comparison signal(s) and based on a programmable dynamic range that is desired for a memory bitcell supply voltage rail. The mode control signals are provided to the power stage circuitry which generates the memory bitcell supply voltage rail from the logic supply voltage rail. A voltage level of the memory bitcell supply voltage rail can be above, below, or the same as the logic supply voltage rail.

Audio Power Amplification With Reduced Input Power Supply Crest Factor

US Patent:
2015020, Jul 16, 2015
Filed:
Jan 13, 2014
Appl. No.:
14/153984
Inventors:
- CUPERTINO CA, US
JOSEPH J. CURCIO - SAN JOSE CA, US
NATHAN A. JOHANNINGSMEIER - SAN JOSE CA, US
CASEY L. HARDY - SAN FRANCISCO CA, US
Assignee:
APPLE INC. - CUPERTINO CA
International Classification:
H03G 3/00
H03G 3/20
Abstract:
A power converter has an output that is coupled in parallel with an energy reservoir circuit and a power supply node of an audio power amplifier. The converter can set an upper limit on its input supply current that is variable in accordance with a control input. A controller is to produce a signal, coupled to the control input of the power converter, that is responsive to a measure of input supply voltage of the power converter and either output voltage of the power converter or output power of the amplifier. Other embodiments are also described and claimed.

Time-Division Multiplexed Data Bus Interface

US Patent:
2014020, Jul 24, 2014
Filed:
Jan 22, 2013
Appl. No.:
13/747205
Inventors:
- Cupertino CA, US
Nathan A. Johanningsmeier - San Jose CA, US
Casey L. Hardy - San Francisco CA, US
Assignee:
Apple Inc. - Cupertino CA
International Classification:
G06F 13/38
US Classification:
710105
Abstract:
An audio system bus has a bus data line and a bus clock line. Audio producers are coupled to the bus to form a time-division multiplexed multi drop bus interface arrangement having protocol slots 0,1, . . . N where N is an integer greater than two. A bus device is coupled to the bus that produces a) a frame marker on the bus data line in slot 0, and b) a data bit on the bus data line in slot 1. The audio producers are to produce their respective audio data bits in their assigned slots other than slots 0 and 1. Other embodiments are also described and claimed.

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