Resumes & CV records
Resumes
Senior Member Of Technical Staff At Advanced Micro Devices
Location:
Greater Boston Area
Industry:
Semiconductors
Charles Tung
Charles P Tung, 5080 Forrest Rd, Graniteville, MA 01886
Charles Tung Phones & Addresses
80 Forrest Rd, Westford, MA 01886 978-6920252
Carlisle, MA
513 Flagler Rd, Fort Collins, CO 80525 970-2258139
451 Boardwalk Dr, Fort Collins, CO 80525
Cambridge, MA
Mentions for Charles P Tung
Publications & IP owners
Us Patents
Metal Density Distribution For Double Pattern Lithography
US Patent:
2014014, May 29, 2014
Filed:
Nov 27, 2012
Appl. No.:
13/686184
Inventors:
- Sunnyvale CA, US
Omid Rowhani - King, CA
Charles P. Tung - Westford MA, US
Omid Rowhani - King, CA
Charles P. Tung - Westford MA, US
Assignee:
ADVANCED MICRO DEVICES, INC. - Sunnyvale CA
International Classification:
H01L 21/3213
H01L 23/48
H01L 23/48
US Classification:
257773, 438671, 430 5
Abstract:
Methods, a computer readable medium, and an apparatus are provided. A method includes and the computer readable medium is configured for decomposing an overall pattern into a first mask pattern that includes a power rail base pattern and into a second mask pattern, and generating on the second mask pattern a power rail insert pattern that is at least partially aligned with the power rail base pattern of the first mask pattern. The apparatus is produced by photolithography using photolithographic masks generated by the method.
Standard Cell Placement Method To Exercise Placement Permutations Of Standard Cell Libraries
US Patent:
2014013, May 8, 2014
Filed:
Nov 8, 2012
Appl. No.:
13/672565
Inventors:
Advanced Micro Devices Inc. - , US
Charles TUNG - Westford MA, US
Charles TUNG - Westford MA, US
Assignee:
Advanced Micro Devices Inc. - Sunnyvale CA
International Classification:
G06F 17/50
US Classification:
716121
Abstract:
A method for validating standard cells stored in a standard cell library and for use in design of an integrated circuit device is described. Each standard cell of the standard cells is iteratively placed adjacent to each side and corner of itself and each other standard cell of the standard cells to produce an interim test layout comprising a first plurality of cell pair permutations. The cell pair permutations are reduced by identifying at least one of: illegal or redundant left-right and top-bottom boundaries, and removing any cell pair permutations using the identified boundaries to generate a final test layout comprising a second plurality of cell pair permutations.
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