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Christopher Lanzafame, 67Huntington Station, NY

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Us Patents

Dynamic Jitter Buffering For Voice-Over-Ip And Other Packet-Based Communication Systems

US Patent:
7006511, Feb 28, 2006
Filed:
Jul 17, 2001
Appl. No.:
09/907120
Inventors:
Christopher Lanzafame - West Deal NJ, US
Christopher B. Moran - Middletown NJ, US
Richard Szajdecki - Jackson NJ, US
Assignee:
Avaya Technology Corp. - Basking Ridge NJ
International Classification:
H04L 12/28
H04L 12/56
US Classification:
370412, 370429, 370516, 375371
Abstract:
A variable-size jitter buffer is used to store information associated with a voice signal, facsimile signal or other received signal in a receiver of a packet-based communication system. The receiver determines an appropriate adjustment time for making an adjustment to the size of the buffer based at least in part on a result of a signal detection operation performed on the received signal. For example, in the case of a received voice signal, the determined adjustment time may be a time at which a state machine associated with a speech detector is in a “no speech” state. If the actual buffer size at the determined adjustment time is not within a designated range of a target computed at least in part based on one or more jitter measurements, the buffer size is adjusted at the determined adjustment time, e. g. , by an amount representative of the difference between the actual buffer size and the target. The invention provides low-delay and low-complexity jitter buffering particularly well suited for use in an Internet Protocol (IP) receiver of a voice-over-IP system.

Synchronization Detection Circuit

US Patent:
4737971, Apr 12, 1988
Filed:
Apr 7, 1986
Appl. No.:
6/849259
Inventors:
Christopher Lanzafame - West End NJ
Bryan S. Moffitt - Red Bank NJ
Assignee:
American Telephone and Telegraph Company - New York NY
AT&T Information Systems Inc. - Morristown NJ
International Classification:
H04L 700
US Classification:
375118
Abstract:
There is disclosed an asynchronous pulse catching circuit that, for each edge of the variable frequency input, regardless of duty cycle, will provide a pulse, synchronized to a high speed clock. There is also disclosed a pulse comparison circuit consisting of a state machine that provides slip detection between the variable input frequency and a reference input frequency. The circuit provides separate outputs indicating positive and negative slip.

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