David CormanWayland, MA

2021034, Nov 4, 2021

Jul 7, 2021

17/369557

- San Diego CA, US
Robert J. McMorrow - Concord MA, US
David W. Corman - Gilbert AZ, US
Nitin Jain - San Diego CA, US
Robert Ian Gresham - San Diego CA, US
Gaurav Menon - San Marcos CA, US
Vipul Jain - Irvine CA, US
Jonathan P. Comeau - San Diego CA, US
Shmuel Ravid - San Diego CA, US

H01Q 1/02
H01Q 21/06
H01Q 3/28
H01Q 21/00
H04B 7/06
H01Q 3/26

A conditioning integrated circuit (CDIC) chip can be used to aggregate signals to/from a number of beam forming integrated circuit (BFIC) chips, and signals to/from a number of CDIC chips can be aggregated by an interface integrated circuit (IFIC) chip. The CDIC chip includes temperature compensation circuitry to adjust the gain of the transmit and receive signals as a function of temperature based on inputs from a temperature sensor. The CDIC may include a plurality of beam forming channels each having a transmit circuit and a receive circuit, a common port coupled to the beam forming channels for selectively providing a common transmit signal to the beam forming channels and receiving a common receive signal from the beam forming channels, and a temperature compensation circuit configured to provide variable attenuation to the common transmit signal and the common receive signal based on a temperature sense signal.

2020007, Mar 5, 2020

Sep 5, 2018

16/122680

- San Diego CA, US
Robert Ian Gresham - Somerville MA, US
Robert McMorrow - Concord MA, US
David Warren Corman - Gilbert AZ, US
Nitin Jain - San Diego CA, US

H04B 17/13
G06G 7/20
H04B 17/21
H03G 3/30

A system and a method for calibrating an output signal of an antenna is disclosed. In one aspect, an apparatus includes a first digital adder configured to generate a gain offset by at least adding gain calibration data from non-volatile memory and gain command data from static memory. The apparatus further includes an amplitude gain circuit configured to modify, based at least in part on the gain offset, an amplitude of a first output signal of a first antenna. The modified amplitude of the first output signal is provided to enable pre-calibration of the first output signal. The apparatus further includes a power detector configured to measure an output power of the first output signal. The apparatus further includes at least one processor configured to generate a difference between the measured and expected output power, and adjust gain command data in response to the generated difference.

2019031, Oct 10, 2019

Apr 4, 2019

16/375251

- San Diego CA, US
Robert J. McMorrow - Concord MA, US
David W. Corman - Gilbert AZ, US
Nitin Jain - San Diego CA, US
Robert Ian Gresham - San Diego CA, US
Gaurav Menon - San Marcos CA, US
Vipul Jain - Irvine CA, US
Jonathan P. Comeau - San Diego CA, US
Shmuel Ravid - San Diego CA, US

H01Q 1/02
H01Q 3/28
H01Q 21/06

A conditioning integrated circuit (CDIC) chip can be used to aggregate signals to/from a number of beam forming integrated circuit (BFIC) chips, and signals to/from a number of CDIC chips can be aggregated by an interface integrated circuit (IFIC) chip. The CDIC chip includes temperature compensation circuitry to adjust the gain of the transmit and receive signals as a function of temperature based on inputs from a temperature sensor. The CDIC may include a plurality of beam forming channels each having a transmit circuit and a receive circuit, a common port coupled to the beam forming channels for selectively providing a common transmit signal to the beam forming channels and receiving a common receive signal from the beam forming channels, and a temperature compensation circuit configured to provide variable attenuation to the common transmit signal and the common receive signal based on a temperature sense signal.