Dong S Yim, 48Asheville, NC

2021037, Dec 2, 2021

Jul 21, 2021

17/382080

- Santa Clara CA, US
Dong Kil YIM - Pleasanton CA, US
Soo Young CHOI - Fremont CA, US
Lai ZHAO - Campbell CA, US

H01L 27/32

Disclosed herein is a sub-pixel circuit for a display device. The sub-pixel circuit has a driving TFT and at least one switching TFT. The at least one switching TFT is an oxide TFT. The sub-pixel circuit additionally has at least one storage capacitor wherein the storage capacitor has a capacitance between about 1 fF and about 55 fF.

2021028, Sep 16, 2021

Jun 3, 2021

17/338239

- Santa Clara CA, US
Jung Bae KIM - San Jose CA, US
Jiarui WANG - San Jose CA, US
Yi CUI - San Jose CA, US
Dong Kil YIM - Pleasanton CA, US
Soo Young CHOI - Fremont CA, US

H01L 23/31
H01L 27/12
H01L 21/02
H01L 29/786

Embodiments of the present disclosure generally relate to nitrogen-rich silicon nitride and methods for depositing the same, and transistors and other devices containing the same. In one or more embodiments, methods for depositing silicon nitride materials are provided and include heating a workpiece to a temperature of about 200 C. to about 250 C., exposing the workpiece to a deposition gas during a plasma-enhanced chemical vapor deposition process, and depositing a nitrogen-rich silicon nitride layer on the workpiece. The deposition gas contains a silicon precursor, a nitrogen precursor, and a carrier gas. A molar ratio of the silicon precursor to the nitrogen precursor to the carrier gas within the deposition gas is about 1:a range from about 4 to about 8:a range from about 20 to about 80, respectively.

2021028, Sep 9, 2021

May 12, 2021

17/318166

- Santa Clara CA, US
Dong Kil YIM - Pleasanton CA, US
Soo Young CHOI - Fremont CA, US

H01L 29/786
H01L 29/24
H01L 29/778

Embodiments herein include thin-film transistors (TFTs) including channel layer stacks with layers having differing mobilities. The TFTs disclosed herein transport higher total current through both the low mobility and the high mobility channel layers due to higher carrier density in high mobility channel layer and/or the high mobility channel layers, which increases the speed of response of the TFTs. The TFTs further include a gate structure disposed over the channel layer stack. The gate structure includes one or more gate electrodes, and thus the TFTs are top-gate (TG), double-gate (DG), or bottom-gate (BG) TFTs. The channel layer stack includes a plurality of layers with differing mobilities. The layers with differing mobilities confer various benefits to the TFT. The high mobility layer increases the speed of response of the TFT.

2021006, Mar 4, 2021

Aug 30, 2019

16/557102

- Santa Clara CA, US
Jung Bae KIM - San Jose CA, US
Jiarui WANG - San Jose CA, US
Yi CUI - San Jose CA, US
Dong Kil YIM - Pleasanton CA, US
Soo Young CHOI - Fremont CA, US

H01L 23/31
H01L 27/12
H01L 29/786
H01L 21/02

Embodiments of the present disclosure generally relate to nitrogen-rich silicon nitride and methods for depositing the same, and transistors and other devices containing the same. In one or more embodiments, a passivation film stack contains a silicon oxide layer disposed on a workpiece and a nitrogen-rich silicon nitride layer disposed on the silicon oxide layer. The nitrogen-rich silicon nitride layer has a silicon concentration of about 20 at % to about 35 at %, a nitrogen concentration of about 40 at % to about 75 at %, and a hydrogen concentration of about 10 at % to about 35 at %. In one or more examples, the passivation film stack contains the silicon oxide layer, the nitrogen-rich silicon nitride layer, and a third layer containing any type of silicon nitride, such as nitrogen-rich silicon nitride and/or hydrogen-rich silicon nitride.

2018035, Dec 6, 2018

Jun 5, 2017

15/613862

- Santa Clara CA, US
Wenqing DAI - San Jose CA, US
Lai ZHAO - Campbell CA, US
Xiangxin RUI - Campbell CA, US
Dong Kil YIM - Pleasanton CA, US
Tae Kyung WON - San Jose CA, US
Soo Young CHOI - Fremont CA, US

H01J 37/32
C22F 1/18
C23C 16/455
C23C 16/44

Implementations described herein generally relate to methods and apparatus for in-situ removal of unwanted deposition buildup from one or more interior surfaces of a substrate-processing chamber. In one implementation, a method for cleaning a processing chamber is provided. The method comprises introducing a reactive species into a processing chamber having a residual ZrOcontaining film formed on one or more interior surfaces of the processing chamber. The reactive species is formed from BCland the one or more interior surfaces includes at least one exposed AlOsurface The method further comprises reacting the residual ZrOcontaining film with the reactive species to form a volatile product. The method further comprises removing the volatile product from the processing chamber, wherein a removal rate of the residual ZrOcontaining film is greater than a removal rate of AlO.