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Eric A Joseph DeceasedJamaica, NY

Related to:
Tierney J Joseph 27 Joseph Jeanina 38 Derrick C Joseph 40 Ann Joseph

Eric Joseph Phones & Addresses

Jamaica, NY   

Flushing, NY   

Work

Company: Eric M Joseph MD Address: 1500 Pleasant Valley Way Suite 206, West Orange, NJ 07052 Phones: 973-3251155 (Phone)

Education

School / High School: Suny Downstate Medical Center 1992

Languages

English

Awards

Healthgrades Honor Roll

Ranks

Certificate: Otolaryngology, 2000
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Mentions for Eric A Joseph

Career records & work history

Medicine Doctors

Eric Joseph Photo 1

Dr. Eric M Joseph, West Orange NJ - MD (Doctor of Medicine)

Specialties:
Ear, Nose, and Throat
Address:
Eric M Joseph MD
1500 Pleasant Valley Way Suite 206, West Orange, NJ 07052
973-3251155 (Phone)
Certifications:
Otolaryngology, 2000
Awards:
Healthgrades Honor Roll
Languages:
English
Hospitals:
Eric M Joseph MD
1500 Pleasant Valley Way Suite 206, West Orange, NJ 07052
Saint Barnabas Medical Center
94 Old Short Hills Road, Livingston, NJ 07039
Education:
Medical School
Suny Downstate Medical Center
Graduated: 1992
Medical School
SUNY Hlth Sci Ctr
Graduated: 1992
Medical School
Rw Johnson & UMDNJ
Graduated: 1992

Eric M. Joseph

Specialties:
Otolaryngology
Work:
Eric M Joseph MD
1500 Pleasant Vly Way STE 206, West Orange, NJ 07052
973-3251155 (phone) 973-3258668 (fax)
North Fullerton Surgery Center
37 N Fullerton Ave STE 1, Montclair, NJ 07042
973-2330433 (phone) 973-2330144 (fax)
Education:
Medical School
SUNY Downstate Medical Center College of Medicine
Graduated: 1992
Procedures:
Hearing Evaluation, Myringotomy and Tympanotomy, Rhinoplasty, Sinus Surgery, Skull/Facial Bone Fractures and Dislocations, Sleep and EEG Testing, Tonsillectomy or Adenoidectomy
Conditions:
Allergic Rhinitis, Chronic Sinusitis, Acute Pharyngitis, Acute Sinusitis, Benign Paroxysmal Positional Vertigo, Deviated Nasal Septum, Hearing Loss, Otitis Media
Languages:
English, Spanish
Description:
Dr. Joseph graduated from the SUNY Downstate Medical Center College of Medicine in 1992. He works in Montclair, NJ and 1 other location and specializes in Otolaryngology. Dr. Joseph is affiliated with Hackensack University Medical Center Mountainside and Saint Barnabas Medical Center.
Eric Joseph Photo 2

Eric Mark Joseph

Specialties:
Otolaryngology
Facial Plastic Surgery
Plastic and Reconstructive Surgery
Education:
State University of New York Downstate (1992)
Alvin I. Glasgold, M.D. (1999) *Plastic Surgery
Eric Joseph Photo 3

Eric Mark Joseph, West Orange NJ

Specialties:
Ear, Nose & Throat Doctor
Address:
1500 Pleasant Valley Way, West Orange, NJ 07052
Education:
State University of New York Downstate Medical Center, College of Medicine - Doctor of Medicine
Board certifications:
American Board of Otolaryngology Certification in Otolaryngology

Eric Joseph resumes & CV records

Resumes

Eric Joseph Photo 49

Chief Of Surveys

Industry:
Civil Engineering
Work:
New York City Department of Design and Construction
Chief of Surveys
Eric Joseph Photo 50

Eric Joseph

Eric Joseph Photo 51

Eric Joseph

Eric Joseph Photo 52

Eric Joseph

Eric Joseph Photo 53

Eric Joseph

Eric Joseph Photo 54

Owner, The Jo-Blae Group, Llc.

Position:
Owner at The Jo-Blae Group, LLC.
Location:
Greater New York City Area
Work:
The Jo-Blae Group, LLC.
Owner
Eric Joseph Photo 55

Eric Joseph

Position:
Customer Service Executive at IBM Global Services
Location:
United States
Work:
IBM Global Services since Sep 2010
Customer Service Executive
Eric Joseph Photo 56

Eric Joseph - Marshfield, MA

Work:
Private Consultation Jan 2010 to 2000
Principal 3rd Dimension - New York, NY Dec 2007 to Dec 2009
President/COO Titan Worldwide - New York, NY Jan 2006 to Dec 2007
Senior Vice President/Worldwide Marketing Director SFX/Clear Channel Entertainment - New York, NY Sep 2000 to Nov 2005
Senior Vice President, Sponsorship and Marketing

Publications & IP owners

Us Patents

Method Of Forming Ring Electrode

US Patent:
7709325, May 4, 2010
Filed:
Mar 6, 2008
Appl. No.:
12/043228
Inventors:
Eric A. Joseph - White Plains NY, US
Chung H. Lam - Peekskill NY, US
Alejandro G. Schrott - New York NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 21/8234
H01L 21/8244
H01L 21/336
H01L 21/44
US Classification:
438266, 438261, 438238, 438652, 257E21589
Abstract:
The present invention in one embodiment provides a method of forming an electrode that includes the steps of providing at least one metal stud in a layer of an interlevel dielectric material; forming a pillar of a first dielectric material atop the at least one metal stud; depositing an electrically conductive material atop the layer of the interlevel dielectric material and an exterior surface of the pillar, wherein a portion of the electrically conductive material is in electrical communication with the at least one metal stud; forming a layer of a second dielectric material atop the electrically conductive material and the substrate; and planarizing the layer of the second dielectric material to expose an upper surface of the electrically conductive material.

Method And Apparatus For Fabricating Sub-Lithography Data Tracks For Use In Magnetic Shift Register Memory Devices

US Patent:
7755921, Jul 13, 2010
Filed:
Aug 14, 2007
Appl. No.:
11/838663
Inventors:
Solomon Assefa - Elmsford NY, US
Michael C. Gaidis - Wappingers Falls NY, US
Eric A. Joseph - White Plains NY, US
Stuart Stephen Papworth Parkin - San Jose CA, US
Christy S. Tyberg - Mahopac NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G11C 19/00
US Classification:
365 80, 365 87
Abstract:
In one embodiment, the invention is a method and apparatus for fabricating sub-lithography data tracks for use in magnetic shift register memory devices. One embodiment of a memory device includes a first stack of dielectric material formed of a first dielectric material, a second stack of dielectric material surrounding the first stack of dielectric material and formed of at least a second dielectric material, and at least one data track for storing information, positioned between the first stack of dielectric material and the second stack of dielectric material, the data track having a high aspect ratio and a substantially rectangular cross section.

Programmable-Resistance Memory Cell

US Patent:
7834339, Nov 16, 2010
Filed:
Dec 19, 2006
Appl. No.:
11/612501
Inventors:
Johannes G. Bednorz - Wolfhausen, CH
Eric A. Joseph - White Plains NY, US
Siegfried F. Karg - Adliswil, CH
Chung H. Lam - Peekskill NY, US
Gerhard I. Meijer - Zurich, CH
Alejandro G. Schrott - New York NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 45/00
US Classification:
257 2, 257 4, 438900, 365148
Abstract:
The present invention relates to a memory cell comprising: a resistive structure; at least two electrodes coupled to the resistive structure, and at least one hydrogen reservoir structure, wherein the application of an electrical signal to one of the at least two electrodes causes the electrical resistance of the resistive structure to be modified by altering a hydrogen-ion concentration in the resistive structure.

Pore Phase Change Material Cell Fabricated From Recessed Pillar

US Patent:
7960203, Jun 14, 2011
Filed:
Jan 29, 2008
Appl. No.:
12/021577
Inventors:
Alejandro G. Schrott - New York NY, US
Chung H. Lam - Peekskill NY, US
Eric A. Joseph - White Plains NY, US
Matthew J. Breitwisch - Yorktown Heights NY, US
Roger W. Cheek - Somers NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 21/00
US Classification:
438 84, 438 95, 438102, 257 3, 257E45002
Abstract:
A method of manufacturing an electrode is provided that includes providing a pillar of a first phase change material atop a conductive structure of a dielectric layer; or the inverted structure; forming an insulating material atop dielectric layer and adjacent the pillar, wherein an upper surface of the first insulating material is coplanar with an upper surface of the pillar; recessing the upper surface of the pillar below the upper surface of the insulating material to provide a recessed cavity; and forming a second phase change material atop the recessed cavity and the upper surface of the insulating material, wherein the second phase change material has a greater phase resistivity than the first phase change material.

Nanoscale Electrodes For Phase Change Memory Devices

US Patent:
8119528, Feb 21, 2012
Filed:
Aug 19, 2008
Appl. No.:
12/194526
Inventors:
Alejandro G Schrott - New York NY, US
Eric A Joseph - White Plains NY, US
Mary Beth Rothwell - Ridgefield CT, US
Matthew J Breitwisch - Yorktown Heights NY, US
Chung H Lam - Peekskill NY, US
Bipin Rajendran - White Plains NY, US
Sarunya Bangsaruntip - Mount Kisco NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 21/302
US Classification:
438689, 438 95, 438105, 438151, 438692, 438700, 438942, 977762, 977888, 977890, 977895, 216 47, 216 88
Abstract:
A process for preparing a phase change memory semiconductor device comprising a (plurality of) nanoscale electrode(s) for alternately switching a chalcogenide phase change material from its high resistance (amorphous) state to its low resistance (crystalline) state, whereby a reduced amount of current is employed, and wherein the plurality of nanoscale electrodes, when present, have substantially the same dimensions.

Pore Phase Change Material Cell Fabricated From Recessed Pillar

US Patent:
8330137, Dec 11, 2012
Filed:
Apr 11, 2011
Appl. No.:
13/084088
Inventors:
Alejandro G. Schrott - New York NY, US
Chung H. Lam - Peekskill NY, US
Eric A. Joseph - White Plains NY, US
Matthew J. Breitwisch - Yorktown Heights NY, US
Roger W. Cheek - Somers NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 47/00
H01L 29/04
US Classification:
257 3, 257E45002, 438 84, 438 95, 438102
Abstract:
A method of manufacturing an electrode is provided that includes providing a pillar of a first phase change material atop a conductive structure of a dielectric layer; or the inverted structure; forming an insulating material atop dielectric layer and adjacent the pillar, wherein an upper surface of the first insulating material is coplanar with an upper surface of the pillar; recessing the upper surface of the pillar below the upper surface of the insulating material to provide a recessed cavity; and forming a second phase change material atop the recessed cavity and the upper surface of the insulating material, wherein the second phase change material has a greater phase resistivity than the first phase change material.

Scaled-Down Phase Change Memory Cell In Recessed Heater

US Patent:
8426967, Apr 23, 2013
Filed:
Jan 5, 2007
Appl. No.:
11/620138
Inventors:
Eric Andrew Joseph - White Plains NY, US
Chung Hon Lam - Peekskill NY, US
Alejandro Gabriel Schrott - New York NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 23/48
H01L 23/52
H01L 29/40
H01L 21/06
US Classification:
257758, 257E21577, 438102
Abstract:
A semiconductor structure configurable for use as a nonvolatile storage element includes a first electrode, an insulating layer formed on at least a portion of an upper surface of the first electrode, and a pillar traversing the insulating layer and being recessed relative to an upper surface of the insulating layer. The pillar includes a heater formed on at least a portion of the upper surface of the first electrode and a collar formed on sidewalls of the insulating layer proximate the heater and on at least a portion of an upper surface of the heater. The structure further includes a PCM layer formed on at least a portion of the upper surface of the insulating layer and substantially filling a volume defined by the upper surface of the heater and at least a portion of an upper surface of the collar. A second electrode is formed on at least a portion of an upper surface of the phase change material layer.

Magnetic Spin Shift Register Memory

US Patent:
8467221, Jun 18, 2013
Filed:
Jul 9, 2010
Appl. No.:
12/833446
Inventors:
Eric A. Joseph - White Plains NY, US
Stuart S. P. Parkin - San Jose CA, US
Mary B. Rothwell - Ridgefield CT, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G11C 19/00
US Classification:
365 80
Abstract:
A method for forming a memory device includes forming a cavity having an inner surface with an undulating profile in a substrate, depositing a ferromagnetic material in the cavity, forming a reading element on the substrate proximate to a portion of the ferromagnetic material, and forming a writing element on the substrate proximate to a second portion of the ferromagnetic material.

Isbn (Books And Publications)

A Drg And Prospective Pricing Action Plan For Nursing

Author:
Eric D. Joseph
ISBN #:
0916499030

Protocols For Evaluating Ambulatory Care

Author:
Eric D. Joseph
ISBN #:
0916499391

Possible Relatives

Cynthia Joseph  David A Joseph  Cyprian M Joseph  Dawn Joseph  Deann M Joseph  Deanna H Joseph  Daisy Joseph  Eric N Johnson  Eric Stamps  Eric P Stander 

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