Flora H Chang, 591000 Escalon Ave, Sunnyvale, CA 94085

2023003, Feb 2, 2023

Oct 6, 2022

17/961463

- Santa Clara CA, US
Xuebin LI - Sunnyvale CA, US
Hua CHUNG - San Jose CA, US
Flora Fong-Song CHANG - Saratoga CA, US

C30B 25/18
C30B 29/06
C30B 33/12
C23C 16/02
C23C 16/56
H01L 21/3065
H01L 21/02
H01L 21/67
H01J 37/32
C23C 16/24
C23C 16/54
H01L 21/687

Embodiments of the present disclosure generally relate to methods for forming epitaxial layers on a semiconductor device. In one or more embodiments, methods include removing oxides from a substrate surface during a cleaning process, flowing a processing reagent containing a silicon source and exposing the substrate to the processing reagent during an epitaxy process, and stopping the flow of the processing reagent. The method also includes flowing a purging gas and pumping residues from the processing system, stopping the flow of the purge gas, flowing an etching gas and exposing the substrate to the etching gas. The etching gas contains hydrogen chloride and at least one germanium and/or chlorine compound. The method further includes stopping the flow of the at least one compound while continuing the flow of the hydrogen chloride and exposing the substrate to the hydrogen chloride and stopping the flow of the hydrogen chloride.

2021002, Jan 28, 2021

Jul 24, 2020

16/938510

- Santa Clara CA, US
Ala MORADIAN - Sunnyvale CA, US
Enle CHOO - Saratoga CA, US
Flora Fong-Song CHANG - Saratoga CA, US
Vilen K. NESTOROV - Pleasanton CA, US
Zhiyuan YE - San Jose CA, US
Maxim D. SHAPOSHNIKOV - Sunnyvale CA, US
Surendra Singh SRIVASTAVA - Santa Clara CA, US
Zhepeng CONG - Vancouver WA, US
Patricia M. LIU - Saratoga CA, US
Errol C. SANCHEZ - Tracy CA, US
Jenny C. LIN - Saratoga CA, US
Schubert S. CHU - San Francisco CA, US
Balakrishnam R. JAMPANA - Santa Clara CA, US

H01L 21/66
H01L 21/67

A method for processing a substrate within a processing chamber comprises receiving a first radiation signal corresponding to a film on a target element disposed within the processing chamber, analyzing the first radiation signal, and controlling the processing of the substrate based on the analyzed first radiation signal. The processing chamber includes a substrate support configured to support the substrate within a processing volume and a controller coupled to a first sensing device configured to receive the first radiation signal.

2021002, Jan 28, 2021

Sep 30, 2019

16/588901

- Santa Clara CA, US
Flora Fong-Song CHANG - Saratoga CA, US
Zhiyuan YE - San Jose CA, US

H01L 29/08
H01L 29/24
H01L 29/66
H01L 29/78

Embodiments of the present disclosure relate to a transistor and methods for forming a transistor. A transistor includes a gate electrode structure disposed over a channel region, a source/drain extension region disposed adjacent to the channel region, and a source/drain region disposed on the source/drain extension region. The source/drain region includes antimony (Sb). The method of forming a transistor includes forming the source/drain extension region and forming the source/drain region on the source/drain extension region. The antimony helps prevent unwanted migration of dopants from the source/drain region to the source/drain extension region.

2019030, Oct 3, 2019

Mar 27, 2019

16/366570

- Santa Clara CA, US
Prerna Sonthalia GORADIA - Mumbai, IN
Robert Jan VISSER - Menlo Park CA, US
Abhishek DUBE - Fremont CA, US
Flora Fong-Song CHANG - Saratoga CA, US
Hua CHUNG - San Jose CA, US

C23C 16/44
C23C 16/52
C23C 16/48

Embodiments of the disclosure may provide a method and apparatus for cleaning an epi-chamber at a low temperature so that residues are quickly eliminated from a surface of the epi-chamber after a performing a low temperature epitaxial deposition process. Some of the benefits of the present disclosure include flowing a chlorine containing gas to an improved epi-chamber having UV capability to chlorinate and quickly remove the epitaxial deposition residues at a low cleaning process temperature. As such, residues are decreased or removed from the epi-chamber such that further processing may be performed.

2018028, Oct 4, 2018

Feb 14, 2018

15/896983

- Santa Clara CA, US
Zhiyuan YE - San Jose CA, US
Flora Fong-Song CHANG - Saratoga CA, US
Abhishek DUBE - Fremont CA, US
Xuebin LI - Sunnyvale CA, US
Errol Antonio C. SANCHEZ - Tracy CA, US
Hua CHUNG - San Jose CA, US
Schubert S. CHU - San Francisco CA, US

H01L 29/66
H01L 29/78
H01L 29/06
H01L 29/167
H01L 29/08

A device comprising Si:As source and drain extensions and Si:As or Si:P source and drain features formed using selective epitaxial growth and a method of forming the same is provided. The epitaxial layers used for the source and drain extensions and the source and drain features herein are deposited by simultaneous film formation and film etching, wherein the deposited material on the monocrystalline layer is etched at a slower rate than deposition material deposited on non-monocrystalline location of a substrate. As a result, an epitaxial layer is deposited on the monocrystalline surfaces, and a layer is not deposited on non-monocrystalline surfaces of the same base material, such as silicon.

2018023, Aug 16, 2018

Feb 6, 2018

15/889669

- Santa Clara CA, US
Xuebin LI - Sunnyvale CA, US
Hua CHUNG - San Jose CA, US
Flora Fong-Song CHANG - Saratoga CA, US

C30B 25/18
C30B 29/06
C30B 33/12
C23C 16/02
C23C 16/56
H01L 21/67
H01L 21/02
H01L 21/3065

The present disclosure generally relate to a cluster tool and methods for forming an epitaxial layer on a semiconductor device. In one implementation, the cluster tool includes a transfer chamber, a pre-clean chamber coupled to the transfer chamber, a plasma-cleaning chamber coupled to the transfer chamber, a deposition chamber coupled to the transfer chamber, an etch chamber coupled to the transfer chamber, and a thermal process chamber coupled to the transfer chamber.

2018019, Jul 5, 2018

Jul 27, 2017

15/661124

- Santa Clara CA, US
Hua CHUNG - San Jose CA, US
Flora Fong-Song CHANG - Saratoga CA, US
Schubert S. CHU - San Francisco CA, US
Abhishek DUBE - Fremont CA, US

H01L 21/02
H01L 29/167
H01L 21/306
C30B 25/18
C30B 29/10
C23C 16/38

A method of forming a film on a substrate having silicon surfaces and dielectric surfaces includes precleaning the substrate; applying an inhibitor species to the dielectric surfaces; and exposing the substrate to a precursor while maintaining a temperature of less than about 600 degrees Celsius.

2017032, Nov 9, 2017

May 2, 2017

15/585016

- Santa Clara CA, US
Hua CHUNG - San Jose CA, US
Flora Fong-Song CHANG - Saratoga CA, US
Abhishek DUBE - Fremont CA, US
Yi-Chiau HUANG - Fremont CA, US
Schubert S. CHU - San Francisco CA, US

H01L 21/3065
H01L 29/66
H01L 29/08
H01L 29/66
H01L 21/67

Methods for forming transistors are provided. A substrate is placed in a processing chamber, and a plurality of epitaxial features is formed on the substrate. The epitaxial feature has at least a surface having the (110) plane and a surface having the (100) plane. An etchant or a gas mixture including an etchant and an etch enhancer or an etch suppressor is introduced into the processing chamber to remove a portion of the epitaxial feature. Etch selectivity between the surface having the (110) plane and the surface having the (100) plane can be tuned by varying the pressure within the processing chamber, the ratio of the flow rate of the etchant or gas mixture to the flow rate of a carrier gas, and/or the ratio of the flow rate of the etch enhancer or suppressor to the flow rate of the etchant.