BackgroundCheck.run
Search For

Frederick W Weber, 722134 Evert Ct, Northbrook, IL 60062

Known as:
Frederick F Weber Fredrick W Weber Fredrick F Weber Fred W Weber Fred F Weber

Frederick Weber Phones & Addresses

Northbrook, IL   

Heidelberg, MS   

Sunnyvale, CA   

Fremont, CA   

Concord, CA   

Shubuta, MS   

Work

Company: Follett hgher edcatn group inc Address: 2211 West St, River Grove, IL 60171 Phones: 708-4372720 Position: Cto Industries: Book Stores
Get Report
Control this profile

Mentions for Frederick W Weber

Career records & work history

Medicine Doctors

Frederick L. Weber

Specialties:
Gastroenterology, Hepatology
Work:
Tri Health Digestive Institute
10600 Montgomery Rd STE 300, Cincinnati, OH 45242
513-7945600 (phone) 513-2811908 (fax)
Tri Health Digestive Institute
9582 Princeton Glendale Rd STE 200, Hamilton, OH 45011
513-7945600 (phone) 513-2811908 (fax)
Education:
Medical School
Cornell University Weill Medical College
Graduated: 1970
Procedures:
Esophageal Dilatation, Colonoscopy, Endoscopic Retrograde Cholangiopancreatography (ERCP), Sigmoidoscopy, Upper Gastrointestinal Endoscopy, Vaccine Administration
Conditions:
Cirrhosis, Infectious Liver Disease, Abdominal Hernia, Acute Pancreatitis, Acute Renal Failure, Alcohol Dependence, Anemia, Benign Polyps of the Colon, Candidiasis, Celiac Disease, Cholelethiasis or Cholecystitis, Chronic Pancreatitis, Chronic Renal Disease, Constipation, Diabetes Mellitus (DM), Disorders of Lipoid Metabolism, Diverticulitis, Diverticulosis, Esophagitis, Fractures, Dislocations, Derangement, and Sprains, Gastric Cancer, Gastritis and Duodenitis, Gastroesophageal Reflux Disease (GERD), Gastrointestinal Hemorrhage, Hemolytic Anemia, Hemorrhoids, Hypertension (HTN), Inflammatory Bowel Disease (IBD), Intestinal Obstruction, Iron Deficiency Anemia, Irritable Bowel Syndrome (IBS), Ischemic Bowel Disease, Liver Cancer, Malignant Neoplasm of Colon, Malignant Neoplasm of Esophagus, Overweight and Obesity, Pancreatic Cancer, Peptic Ulcer Disease, Peripheral Nerve Disorders, Pneumonia, Poisoning by Drugs, Meds, or Biological Substances, Pulmonary Embolism, Rectal, Abdomen, Small Intestines, or Colon Cancer, Sarcoidosis, Septicemia, Skin and Subcutaneous Infections, Substance Abuse and/or Dependency, Varicose Veins, Venous Embolism and Thrombosis, Vitamin D Deficiency
Languages:
English, Spanish
Description:
Dr. Weber graduated from the Cornell University Weill Medical College in 1970. He works in Hamilton, OH and 1 other location and specializes in Gastroenterology and Hepatology. Dr. Weber is affiliated with Bethesda North Hospital, Fort Hamilton Hospital and Good Samaritan Hospital.

Frederick H. Weber

Specialties:
Gastroenterology
Work:
University Of Alabama Gastroenterology & Hepatology
2000 6 Ave S FL 3, Birmingham, AL 35233
205-9346060 (phone) 205-8018668 (fax)
Education:
Medical School
Tufts University School of Medicine
Graduated: 1983
Procedures:
Colonoscopy, Esophageal Dilatation, Sigmoidoscopy, Upper Gastrointestinal Endoscopy
Conditions:
Cirrhosis, Infectious Liver Disease, Acute Pancreatitis, Anal Fissure, Benign Polyps of the Colon, Cholelethiasis or Cholecystitis, Chronic Pancreatitis, Constipation, Diverticulitis, Diverticulosis, Esophagitis, Gastric Cancer, Gastritis and Duodenitis, Gastroesophageal Reflux Disease (GERD), Gastrointestinal Hemorrhage, Hemorrhoids, Inflammatory Bowel Disease (IBD), Intestinal Obstruction, Intussusception, Irritable Bowel Syndrome (IBS), Liver Cancer, Malignant Neoplasm of Colon, Malignant Neoplasm of Esophagus, Pancreatic Cancer, Peptic Ulcer Disease
Languages:
Chinese, English, French, Spanish
Description:
Dr. Weber graduated from the Tufts University School of Medicine in 1983. He works in Birmingham, AL and specializes in Gastroenterology. Dr. Weber is affiliated with UAB Highlands Hospital and University Of Alabama Hospital.

Frederick Weber resumes & CV records

Resumes

Frederick Weber Photo 32

Director Of Administration At Chapman And Cutler Llp

Location:
Greater Chicago Area
Industry:
Legal Services
Frederick Weber Photo 33

Director Of Travel Industry Sales At Carey International

Position:
Director of Travel Industry Sales at Carey International
Location:
Delray Beach, Florida
Industry:
Leisure, Travel & Tourism
Work:
Carey International - Southeast since Feb 2013
Director of Travel Industry Sales Carey International - Florida Dec 2008 - Feb 2013
Director National Sales; Corporate Accounts Avis Budget Group - Chicago IL. 1995 - 2003
National Association Sales Manager American Express - Greater Milwaukee Area Dec 1993 - Apr 1995
Director of Sales; CORE Accounts Avis Budget Group - St. Louis, MO. Apr 1989 - Nov 1993
Regional Sales Manager Mid-West Avis Budget Group - St. Louis Mo. Sep 1986 - Apr 1989
Account Manager
Education:
University of St. Thomas 1980 - 1983
B.S., Business / Marketing
Frederick Weber Photo 34

Frederick Weber

Frederick Weber Photo 35

Frederick Weber

Frederick Weber Photo 36

Frederick Weber

Frederick Weber Photo 37

Frederick Weber

Frederick Weber Photo 38

Senior Vice President And Senior Estate Administrator At Northern Trust

Location:
Greater Chicago Area
Industry:
Banking
Frederick Weber Photo 39

Senior Programmer At Cdw

Location:
Greater Chicago Area
Industry:
Information Technology and Services

Publications & IP owners

Wikipedia

Frederick Weber Photo 40

Frederick Weber (Fencer)

Frederick Weber (1 December 1905 17 February 1994) was an American Olympic fencer and modern pentathlete. He competed at the 1936 Summer Olympics. ...

Us Patents

Optimized Allocation Of Multi-Pipeline Executable And Specific Pipeline Executable Instructions To Execution Pipelines Based On Criteria

US Patent:
6370637, Apr 9, 2002
Filed:
Aug 5, 1999
Appl. No.:
09/370789
Inventors:
Stephan G. Meier - Sunnyvale CA
Norbert Juffa - San Jose CA
Frederick D. Weber - San Jose CA
Stuart F. Oberman - Sunnyvale CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F 938
US Classification:
712215, 709104, 712222
Abstract:
A microprocessor with a floating point unit configured to efficiently allocate multi-pipeline executable instructions is disclosed. Multi-pipeline executable instructions are instructions that are not forced to execute in a particular type of execution pipe. For example, junk ops are multi-pipeline executable. A junk op is an instruction that is executed at an early stage of the floating point units pipeline (e. g. , during register rename), but still passes through an execution pipeline for exception checking. Junk ops are not limited to a particular execution pipeline, but instead may pass through any of the microprocessors execution pipelines in the floating point unit. Multi-pipeline executable instructions are allocated on a per-clock cycle basis using a number of different criteria. For example, the allocation may vary depending upon the number of multi-pipeline executable instructions received by the floating point unit in a single clock cycle.

Method And Apparatus For Calculating A Power Of An Operand

US Patent:
6381625, Apr 30, 2002
Filed:
Feb 12, 2001
Appl. No.:
09/782474
Inventors:
Stuart Oberman - Sunnyvale CA
Norbert Juffa - San Jose CA
Ming Siu - San Jose CA
Frederick D Weber - San Jose CA
Ravikrishna Cherukuri - Milpitas CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F 7552
US Classification:
708606, D8605
Abstract:
A multiplier capable of performing signed and unsigned scalar and vector multiplication is disclosed. The multiplier is configured to receive signed or unsigned multiplier and multiplicand operands in scalar or packed vector form. An effective sign for the multiplier and multiplicand operands may be calculated and used to create and select a number of partial products according to Booths algorithm. Once the partial products have been created and selected, they may be summed and the results may be output. The results may be signed or unsigned, and may represent vector or scalar quantities. When a vector multiplication is performed, the multiplier may be configured to generate and select partial products so as to effectively isolate the multiplication process for each pair of vector components. The multiplier may also be configured to sum the products of the vector components to form the vector dot product. The final product may be output in segments so as to require fewer bus lines.

Rapid Execution Of Fcmov Following Fcomi By Storing Comparison Result In Temporary Register In Floating Point Unit

US Patent:
6393555, May 21, 2002
Filed:
Aug 5, 1999
Appl. No.:
09/370787
Inventors:
Stephan G. Meier - Sunnyvale CA
Norbert Juffa - San Jose CA
Frederick D. Weber - San Jose CA
Stuart F. Oberman - Sunnyvale CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F 930
US Classification:
712222, 712 32, 712 34, 712217, 712225
Abstract:
A microprocessor with a floating point unit configured to rapidly execute floating point compare (FCOMI) type instructions that are followed by floating point conditional move (FCMOV) type instructions is disclosed. FCOMI-type instructions, which normally store their results to integer status flag registers, are modified to store a copy of their results to a temporary register located within the floating point unit. If an FCMOV-type instruction is detected following an FCOMI-type instruction, then the FCMOV-type instructions source for flag information is changed from the integer flag register to the temporary register. FCMOV-type instructions are thereby able to execute earlier because they need not wait for the integer flags to be read from the integer portion of the microprocessor. A computer system and method for rapidly executing FCOMI-type instructions followed by FCMOV-type instructions are also disclosed.

Method And Apparatus For Rounding In A Multiplier

US Patent:
6397238, May 28, 2002
Filed:
Feb 12, 2001
Appl. No.:
09/782475
Inventors:
Stuart Oberman - Sunnyvale CA
Norbert Juffa - San Jose CA
Ming Siu - San Jose CA
Frederick D Weber - San Jose CA
Ravikrishna Cherukuri - Milpitas CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F 752
US Classification:
708497, 708551
Abstract:
A multiplier capable of performing signed and unsigned scalar and vector multiplication is disclosed. The multiplier is configured to receive signed or unsigned multiplier and multiplicand operands in scalar or packed vector form. An effective sign for the multiplier and multiplicand operands may be calculated and used to create and select a number of partial products according to Booths algorithm. Once the partial products have been created and selected, they may be summed and the results may be output. The results may be signed or unsigned, and may represent vector or scalar quantities. When a vector multiplication is performed, the multiplier may be configured to generate and select partial products so as to effectively isolate the multiplication process for each pair of vector components. The multiplier may also be configured to sum the products of the vector components to form the vector dot product. The final product may be output in segments so as to require fewer bus lines.

Method And Apparatus For Rapid Execution Of Fcom And Fstsw

US Patent:
6425074, Jul 23, 2002
Filed:
Sep 10, 1999
Appl. No.:
09/393524
Inventors:
Stephan G. Meier - Sunnyvale CA
Norbert Juffa - San Jose CA
Frederick D. Weber - San Jose CA
Stuart F. Oberman - Sunnyvale CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F 9302
US Classification:
712222, 712228, 712245, 712217, 708495, 708525, 708501, 708204, 711123
Abstract:
A microprocessor configured to rapidly execute floating point store status word (FSTSW) type instructions that are immediately preceded by floating point compare (FCOM) type instructions is disclosed. FCOM-type instructions are modified to store their results to an architectural floating point status word and a temporary destination register. If an FSTSW-type instruction is detected immediately following an FCOM-type instruction, then the FSTSW-type instruction is transformed into a special fast floating point store status word (FSTSWEF) instruction. Unlike the FSTSW-type instruction, which is serializing and negatively impacts performance, the FSTSWEF instruction is not serializing and allows execution to continue without undue serialization. A computer system and method for rapidly executing FSTSW instructions immediately preceded by FCOM-type instructions are also disclosed.

Computer System Including A Novel Address Translation Mechanism

US Patent:
6446189, Sep 3, 2002
Filed:
Jun 1, 1999
Appl. No.:
09/323321
Inventors:
Frederick D. Weber - San Jose CA
William A. Hughes - Burlingame CA
William K. Lewchuk - Austin TX
Scott A. White - Austin TX
Michael T. Clark - Austin TX
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F 1200
US Classification:
711207, 711209, 710 49
Abstract:
A processor is presented including a cache unit coupled to a bus interface unit (BIU). Address signal selection and masking functions are performed by circuitry within the BIU rather than within the cache unit, and physical addresses produced by the BIU are stored within the TLB. As a result, address signal selection and masking circuitry (e. g. , a multiplexer and gating logic) are eliminated from a critical speed path within the cache unit, allowing the operational speed of the cache unit to be increased. The cache unit stores data items, and produces a data item corresponding to a received linear address. A translation lookaside buffer (TLB) within the cache unit stores multiple linear addresses and corresponding physical addresses. When a physical address corresponding to the received linear address is not found within the TLB, the cache unit passes the linear address to the BIU. The BIU includes address translation circuitry, a multiplexer, and gating logic, and returns the physical address corresponding to the linear address to the cache unit.

Flexible Implementation Of A System Management Mode (Smm) In A Processor

US Patent:
6453278, Sep 17, 2002
Filed:
Jul 21, 2000
Appl. No.:
09/620981
Inventors:
John G. Favor - San Jose CA
Frederick D. Weber - San Jose CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F 944
US Classification:
703 27, 703 26, 710 17, 710264, 712209
Abstract:
A system management mode (SMM) of operating a processor includes only a basic set of hardwired hooks or mechanisms in the processor for supporting SMM. Most of SMM functionality, such as the processing actions performed when entering and exiting SMM, is âsoftâ and freely defined. A system management interrupt (SMI) pin is connected to the processor so that a signal on the SMI pin causes the processor to enter SMM mode. SMM is completely transparent to all other processor operating software. SMM handler code and data is stored in memory that is protected and hidden from normal software access.

Locking Mechanism Override And Disable For Personal Computer Rom Access Protection

US Patent:
7003676, Feb 21, 2006
Filed:
May 30, 2001
Appl. No.:
09/871084
Inventors:
Frederick D. Weber - San Jose CA, US
Dale E. Gulick - Austin TX, US
Assignee:
Advanced Micro Devices, Inc. - Austin TX
International Classification:
G06F 11/30
H04L 9/00
US Classification:
713194, 713172, 713182, 726 34
Abstract:
A method and system for overriding access locks on secure assets in a computer system. The system includes a processor and a device coupled to the processor. The device includes one or more sub-devices, one or more access locks, and an access lock override register that stores one or more access lock override bits, including a lock override bit. The one or more access locks are configured to prevent access to the one or more sub-devices when the one or more access locks are engaged. Access to the one or more sub-devices is not allowed when the lock override bit is set. The method includes requesting a memory transaction for one or more memory addresses and determining a lock status for the one or more memory addresses. The method also includes returning the lock status for the one or more memory addresses. The method may determine if the lock status for the one or more memory address can be changed.

Isbn (Books And Publications)

Aspects Of Death And Correlated Aspects Of Life In Art, Epigram, And Poetry: Contributions Towards An Anthology And An Iconography Of The Subject

Author:
Frederick Parkes Weber
ISBN #:
0843400730

Possible Relatives

Cynthia S Weber  David A Weber  Cyril A Weber  Dawn L Weber  Dean R Weber  Dale A Weber  Debbie R Weber  Frederick C Last  Frederick W Johnson  Frederick L Stancil 

NOTICE: You may not use BackgroundCheck or the information it provides to make decisions about employment, credit, housing or any other purpose that would require Fair Credit Reporting Act (FCRA) compliance. BackgroundCheck is not a Consumer Reporting Agency (CRA) as defined by the FCRA and does not provide consumer reports.