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Hemant R Joshi, 69Allen, TX

Hemant Joshi Phones & Addresses

Allen, TX   

4460 Stargazer Dr, Plano, TX 75024    214-4079537   

1308 Newbury Ln, Plano, TX 75025    972-5277198    972-5758192   

1309 Newbury Ln, Plano, TX 75025    972-5277198    972-5758192   

Austin, TX   

1720 Halford Ave, Santa Clara, CA 95051   

Cincinnati, OH   

San Jose, CA   

4460 Stargazer Dr, Plano, TX 75024    972-7682866   

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Position: Transportation and Material Moving Occupations

Education

Degree: Associate degree or higher

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Hemant Joshi

Hemant Joshi ( ) is a Professor of Mass Communication and Journalism. He has taught Communication, Radio, TV and Hindi journalism for two...

Us Patents

System And Method For Setup And Hold Characterization In Integrated Circuit Cells

US Patent:
6640330, Oct 28, 2003
Filed:
Apr 24, 2001
Appl. No.:
09/841797
Inventors:
Hemant Joshi - Milpitas CA
Assignee:
Artisan Components, Inc. - Sunnyvale CA
International Classification:
G06E 1750
US Classification:
716 9, 716 6
Abstract:
An invention is disclosed for setup and hold time characterization in an integrated circuit cell. A setup time is obtained for a first constraint pin. A setup time is also calculated for a test point defined in the integrated circuit cell using the setup time for the first constraint pin and a first propagation delay from the first constraint pin to the test point. A setup time for a second constraint pin is determined based on the setup time for the test point and a second propagation delay from the second constraint pin to the test point. In addition to the setup time, a hold time can be obtained for the first constraint pin, and a hold time for the test point can be calculated using the hold time for the first constraint pin and the first propagation delay. Further, a hold time for the second constraint pin can be determined based on the hold time for the test point and the second propagation delay.

Method Of Cross-Mapping Integrated Circuit Design Formats

US Patent:
6941530, Sep 6, 2005
Filed:
Mar 24, 2003
Appl. No.:
10/395476
Inventors:
Hemant Joshi - Plano TX, US
David A. Thomas - Sugar Land TX, US
John Bach - Sugar Land TX, US
Rand B. Carawan - Stafford TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F017/50
US Classification:
716 4, 716 5, 702 94, 702 95
Abstract:
A method of cross-mapping integrated circuit (“IC”) elements nets in a IC and/or directing a probe to points on an IC to achieve minimal interference from adjacent structures is disclosed. The method of provides a more streamlined approach than referencing points from a physical layout representation of the IC to the actual IC being tested. The improved correlation between the actual packaged IC and the layout of the IC is accomplished using artificial locator cells. Preferably, the artificial locator cells are generated from mathematical operations of the extracted version of the layout, and they further provide coordinate information for where minimal interference from adjacent structures may be accomplished. Artificial locator cells may be generated from a layout representing a hierarchical representation or alternately each element that is instantiated from a reference library may already have artificial locator cells included.

Determining Feasibility Of Ic Edits

US Patent:
7117476, Oct 3, 2006
Filed:
Jun 4, 2004
Appl. No.:
10/861294
Inventors:
John M. Bach - Sugar Land TX, US
Rand B. Carawan - Stafford TX, US
Hemant Joshi - Plano TX, US
David A. Thomas - Sugar Land TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 17/50
US Classification:
716 21, 716 19, 716 20
Abstract:
A computer method of analyzing an integrated circuit (“IC”) masked design data, comprising grouping into a cluster areas of layers preceding a target metal layer that are suitable for milling, deleting portions of the target metal layer that do not meet minimum tool spacing requirements to produce a modified metal layer, deleting portions of the modified metal layer that do not meet minimum design rule width requirements to produce a final metal layer, and comparing the final metal layer and the cluster to identify common areas.

Method To Automatically Generate 'Guided Meditation' Audio Data File

US Patent:
2006018, Aug 24, 2006
Filed:
Feb 23, 2005
Appl. No.:
10/906492
Inventors:
Hemant Joshi - Milpitas CA, US
Jaya Joshi - Milpitas CA, US
International Classification:
A61B 5/08
US Classification:
600529000
Abstract:
An invention is disclosed for automatically generating the ‘Guided Meditation’ using the customer Preferences and Requirements. The customer Preferences and requirements if specified can be used to select meditation stages, language used for instructions, duration, and theme of meditation and ambience sounds for the entire ‘Guided Meditation’. The customer may specify the Preferences and Requirements over Internet, phone, email or postal mail and the automatically generated ‘Guided Meditation’ can be delivered as Internet download, as an email attachment or as audio CD or audiocassette by postal mail.

Active Vehile Shield

US Patent:
2006020, Sep 21, 2006
Filed:
Mar 20, 2005
Appl. No.:
10/907100
Inventors:
Hemant Joshi - Milpitas CA, US
Jaya Joshi - Milpitas CA, US
International Classification:
B60K 28/00
US Classification:
180271000
Abstract:
An invention is disclosed for having an ‘active external vehicle shield’ which deploys on detection of an ‘imminent collision’ condition. This ‘invention’ provides a shield, which is fully deployed around the vehicle before the collision happens. When the collision happens this shield absorbs most of the collision energy, resulting in reduction of the risk of injury to the occupants of the vehicle.

Automated Maintenance Window Predictions For Datacenters

US Patent:
2021000, Jan 7, 2021
Filed:
Jul 1, 2019
Appl. No.:
16/458452
Inventors:
- Palo Alto CA, US
Hemant Joshi - San Jose CA, US
Suma Cherukuri - Milpitas CA, US
International Classification:
G05B 23/02
G06F 8/65
G06F 9/455
Abstract:
Disclosed are various embodiments for automating the prediction of maintenance windows in datacenter environments. A user input can be received specifying a start time for a maintenance window. A first amount of time for a host machine to enter a maintenance mode at the start time for the maintenance window is estimated. Then, a second amount of time to update a software component installed on the host machine is estimated. A third amount of time for the host to update a storage cache to match a respective data store can also be estimated. A maintenance window length can then be predicted that comprises a sum of the first amount of time, the second amount of time, and third amount of time. The maintenance window length can then be rendered within a user interface.

Corner Database Generator

US Patent:
2018017, Jun 21, 2018
Filed:
Dec 21, 2016
Appl. No.:
15/387373
Inventors:
- Cambridge, GB
Mouli Rajaram Chollangi - Fremont CA, US
Hemant Joshi - San Ramon CA, US
Yew Keong Chong - Austin TX, US
Satinderjit Singh - Fremont CA, US
Betsie Jacob - Fremont CA, US
Neeraj Dogra - Gilroy CA, US
Sriram Thyagarajan - Austin TX, US
International Classification:
G06F 17/50
G06F 17/30
Abstract:
Various implementations described herein are directed to a computing device. The computing device may include a mapper module that receives a user configuration input of a destination corner for building a destination corner database. The mapper module may include a decision making engine that decides fabrication parameters for building the destination corner database based on the verified user configuration input and memory compiler metadata. The computing device may include a builder module that performs a simulation of the destination corner based on the fabrication parameters, collects simulation results data associated with the simulation, and builds the destination corner database for the destination corner based on the simulation results data and source corner data. The computing device may include a memory compiler that accesses the destination corner database and generates memory instance structures and their electronic digital automation (EDA) views for the destination corner based on the destination corner database.

Pin-Based Noise Characterization For Silicon Compiler

US Patent:
2018017, Jun 21, 2018
Filed:
Dec 21, 2016
Appl. No.:
15/387460
Inventors:
- Cambridge, GB
Hongwei Zhu - San Jose CA, US
Hemant Joshi - San Ramon CA, US
Chandan Kumar Rajendran - San Jose CA, US
Prashant Lokeshwar - San Jose CA, US
Umang Deepak Kumar Doshi - San Jose CA, US
Neeraj Dogra - Gilroy CA, US
International Classification:
G06F 17/50
Abstract:
A silicon compiler, such as a memory compiler, provides for pin-based noise characterization in a computationally efficient manner. For a given user-provided option set, a silicon compiler provides a noise database for the set of all available memory instances by performing pin-based noise characterization on only a subset of the set of available memory instances.

Amazon

Hemant Joshi Photo 47

Hydro-Geochemistry Of Hill Springs: A Case Study

Author:
Hemant K. Joshi, N. S. Bhandari
Publisher:
LAP LAMBERT Academic Publishing
Binding:
Paperback
Pages:
56
ISBN #:
3659336890
EAN Code:
9783659336898
The book is a step forward in the direction of hydro-geochemical analysis of selected hill springs. Further, the main focus of the study is the potability of the spring water. In many areas, springs water quality limits to supply of potable fresh water. Hence, to utilize and predict the change in sp...
Hemant Joshi Photo 48

From Survival To Significance ... A Journey

Author:
Hemant Joshi
Publisher:
Dar Akhbar Al Khaleej
Binding:
Hardcover
Pages:
182
ISBN #:
9990110131
EAN Code:
9789990110135
This book is about an ordinary person who became extra-ordinary not by doing different things, but by doing things differently. It is a description of a life journey that has had plenty of unexpected twists, turns, and rough terrain. This person had dogged determination to reach the summit. He cross...
Hemant Joshi Photo 49

The Magic And Logic Of Elliott Waves [4-Color Edition]

Author:
Srirang Joshi Hemant Kale
Publisher:
Shroff Publishers and Distributors Pvt. Ltd.
Binding:
Hardcover
Pages:
204
ISBN #:
8184047541
EAN Code:
9788184047547
We are very much impressed by the theory of Mr. R. N. Elliott. Elliott wave theory is so remarkably unique that it has no equal in explaining the indecipherable ways of the market. It was developed so late in life by a man not of Wall Street background is in itself very phenomenal. As you read about...
Hemant Joshi Photo 50

Software Engineering

Author:
S. K. Sharma, Hemant Joshi, Sunita Gupta
Publisher:
Vayu Education Of India
Binding:
Paperback
ISBN #:
9380712308
EAN Code:
9789380712307

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