Heung Park resumes & CV records
Resumes
Heung Soo Park
Heung Park
Heung Park
Heung G Park, 68Santa Maria, CA
Heung Park Phones & Addresses
Santa Maria, CA
Chantilly, VA
Clifton, VA
San Mateo, CA
Mentions for Heung G Park
Publications & IP owners
Us Patents
High Mobility Monolithic P-I-N Diodes
US Patent:
8298887, Oct 30, 2012
Filed:
Jun 25, 2010
Appl. No.:
12/824032
Inventors:
Xinhai Han - Sunnyvale CA, US
Nagarajan Rajagopalan - Santa Clara CA, US
Ji Ae Park - Santa Clara CA, US
Bencherki Mebarki - Santa Clara CA, US
Heung Lak Park - Santa Clara CA, US
Bok Hoen Kim - San Jose CA, US
Nagarajan Rajagopalan - Santa Clara CA, US
Ji Ae Park - Santa Clara CA, US
Bencherki Mebarki - Santa Clara CA, US
Heung Lak Park - Santa Clara CA, US
Bok Hoen Kim - San Jose CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/8234
US Classification:
438237
Abstract:
Methods of forming high-current density vertical p-i-n diodes on a substrate are described. The methods include the steps of concurrently combining a group-IV-element-containing precursor with a sequential exposure to an n-type dopant precursor and a p-type dopant precursor in either order. An intrinsic layer is deposited between the n-type and p-type layers by reducing or eliminating the flow of the dopant precursors while flowing the group-IV-element-containing precursor. The substrate may reside in the same processing chamber during the deposition of each of the n-type layer, intrinsic layer and p-type layer and the substrate is not exposed to atmosphere between the depositions of adjacent layers.
Silicon Nitride Passivation Layer For Covering High Aspect Ratio Features
US Patent:
8563095, Oct 22, 2013
Filed:
Mar 15, 2010
Appl. No.:
12/724396
Inventors:
Nagarajan Rajagopalan - Santa Clara CA, US
Xinhai Han - Sunnyvale CA, US
Ryan Yamase - Santa Clara CA, US
Ji Ae Park - Santa Clara CA, US
Shamik Patel - Redlands CA, US
Thomas Nowak - Cupertino CA, US
Zhengjiang “David” Cui - San Jose CA, US
Mehul Naik - San Jose CA, US
Heung Lak Park - Santa Clara CA, US
Ran Ding - Sunnyvale CA, US
Bok Hoen Kim - San Jose CA, US
Xinhai Han - Sunnyvale CA, US
Ryan Yamase - Santa Clara CA, US
Ji Ae Park - Santa Clara CA, US
Shamik Patel - Redlands CA, US
Thomas Nowak - Cupertino CA, US
Zhengjiang “David” Cui - San Jose CA, US
Mehul Naik - San Jose CA, US
Heung Lak Park - Santa Clara CA, US
Ran Ding - Sunnyvale CA, US
Bok Hoen Kim - San Jose CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H05H 1/24
C23C 16/34
C23C 16/34
US Classification:
427579, 427 968, 427 988, 427 992, 427255393, 427255394, 427535
Abstract:
A method of forming a passivation layer comprising silicon nitride on features of a substrate is described. In a first stage of the deposition method, a dielectric deposition gas, comprising a silicon-containing gas and a nitrogen-containing gas, is introduced into the process zone and energized to deposit a silicon nitride layer. In a second stage, a treatment gas, having a different composition than that of the dielectric deposition gas, is introduced into the process zone and energized to treat the silicon nitride layer. The first and second stages can be performed a plurality of times.
Zero Shrinkage Smooth Interface Oxy-Nitride And Oxy-Amorphous-Silicon Stacks For 3D Memory Vertical Gate Application
US Patent:
2013016, Jun 27, 2013
Filed:
Dec 27, 2011
Appl. No.:
13/337749
Inventors:
XINHAI HAN - Sunnyvale CA, US
NAGARAJAN RAJAGOPALAN - Santa Clara CA, US
GUANGCHI XUAN - Sunnyvale CA, US
JIANHUA ZHOU - Campbell CA, US
JIGANG LI - Sunnyvale CA, US
SHAHID SHAIKH - Santa Clara CA, US
PATRICK REILLY - Dublin CA, US
THOMAS NOWAK - Cupertino CA, US
JUAN CARLOS ROCHA-ALVAREZ - San Carlos CA, US
HEUNG LAK PARK - San Jose CA, US
BOK HOEN KIM - San Jose CA, US
NAGARAJAN RAJAGOPALAN - Santa Clara CA, US
GUANGCHI XUAN - Sunnyvale CA, US
JIANHUA ZHOU - Campbell CA, US
JIGANG LI - Sunnyvale CA, US
SHAHID SHAIKH - Santa Clara CA, US
PATRICK REILLY - Dublin CA, US
THOMAS NOWAK - Cupertino CA, US
JUAN CARLOS ROCHA-ALVAREZ - San Carlos CA, US
HEUNG LAK PARK - San Jose CA, US
BOK HOEN KIM - San Jose CA, US
Assignee:
APPLIED MATERIALS, INC. - Santa Clara CA
International Classification:
H01L 29/78
H01L 21/20
H01L 21/20
US Classification:
257 66, 438488, 257E2109, 257E29262
Abstract:
Methods are provided for depositing a stack of film layers for use in vertical gates for 3D memory devices, by depositing a sacrificial nitride film layer at a sacrificial film deposition temperature greater than about 550 C.; depositing an oxide film layer over the nitride film layer, at an oxide deposition temperature of about 600 C. or greater; repeating the above steps to deposit a film stack having alternating layers of the sacrificial films and the oxide films; forming a plurality of holes in the film stack; and depositing polysilicon in the plurality of holes in the film stack at a polysilicon process temperature of about 700 C. or greater, wherein the sacrificial film layers and the oxide film layers experience near zero shrinkage during the polysilicon deposition. Flash drive memory devices may also be made by these methods.
Pecvd Process
US Patent:
2020039, Dec 24, 2020
Filed:
Sep 3, 2020
Appl. No.:
17/011853
Inventors:
- Santa Clara CA, US
Xinhai HAN - Santa Clara CA, US
Michael Wenyoung TSIANG - Fremont CA, US
Masaki OGATA - San Jose CA, US
Zhijun JIANG - Sunnyvale CA, US
Juan Carlos ROCHA-ALVAREZ - San Carlos CA, US
Thomas NOWAK - Cupertino CA, US
Jianhua ZHOU - Campbell CA, US
Ramprakash SANKARAKRISHNAN - Santa Clara CA, US
Amit Kumar BANSAL - Milpitas CA, US
Jeongmin LEE - San Ramon CA, US
Todd EGAN - Fremont CA, US
Edward BUDIARTO - Fremont CA, US
Dmitriy PANASYUK - Santa Clara CA, US
Terrance Y. LEE - Oakland CA, US
Jian J. CHEN - Fremont CA, US
Mohamad A. AYOUB - Los Gatos CA, US
Heung Lak PARK - San Jose CA, US
Patrick REILLY - Pleasanton CA, US
Shahid SHAIKH - Santa Clara CA, US
Bok Hoen KIM - San Jose CA, US
Sergey STARIK - Kiev, UA
Ganesh BALASUBRAMANIAN - Fremont CA, US
Xinhai HAN - Santa Clara CA, US
Michael Wenyoung TSIANG - Fremont CA, US
Masaki OGATA - San Jose CA, US
Zhijun JIANG - Sunnyvale CA, US
Juan Carlos ROCHA-ALVAREZ - San Carlos CA, US
Thomas NOWAK - Cupertino CA, US
Jianhua ZHOU - Campbell CA, US
Ramprakash SANKARAKRISHNAN - Santa Clara CA, US
Amit Kumar BANSAL - Milpitas CA, US
Jeongmin LEE - San Ramon CA, US
Todd EGAN - Fremont CA, US
Edward BUDIARTO - Fremont CA, US
Dmitriy PANASYUK - Santa Clara CA, US
Terrance Y. LEE - Oakland CA, US
Jian J. CHEN - Fremont CA, US
Mohamad A. AYOUB - Los Gatos CA, US
Heung Lak PARK - San Jose CA, US
Patrick REILLY - Pleasanton CA, US
Shahid SHAIKH - Santa Clara CA, US
Bok Hoen KIM - San Jose CA, US
Sergey STARIK - Kiev, UA
Ganesh BALASUBRAMANIAN - Fremont CA, US
International Classification:
C23C 16/52
G01B 11/06
H01L 21/687
H01L 21/67
C23C 16/509
G01N 21/55
G01N 21/65
H01L 21/00
C23C 16/458
C23C 16/46
C23C 16/50
C23C 16/505
C23C 16/455
G01B 11/06
H01L 21/687
H01L 21/67
C23C 16/509
G01N 21/55
G01N 21/65
H01L 21/00
C23C 16/458
C23C 16/46
C23C 16/50
C23C 16/505
C23C 16/455
Abstract:
A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.
Pecvd Process
US Patent:
2018025, Sep 13, 2018
Filed:
May 10, 2018
Appl. No.:
15/976468
Inventors:
- Santa Clara CA, US
Xinhai HAN - Santa Clara CA, US
Michael Wenyoung TSIANG - Fremont CA, US
Masaki OGATA - San Jose CA, US
Zhijun JIANG - Sunnyvale CA, US
Juan Carlos ROCHA-ALVAREZ - San Carlos CA, US
Thomas NOWAK - Cupertino CA, US
Jianhua ZHOU - Campbell CA, US
Ramprakash SANKARAKRISHNAN - Santa Clara CA, US
Amit Kumar BANSAL - Milpitas CA, US
Jeongmin LEE - Sunnyvale CA, US
Todd EGAN - Fremont CA, US
Edward BUDIARTO - Fremont CA, US
Dmitriy PANASYUK - Santa Clara CA, US
Terrance Y. LEE - Oakland CA, US
Jian J. CHEN - Fremont CA, US
Mohamad A. AYOUB - Los Gatos CA, US
Heung Lak PARK - San Jose CA, US
Patrick REILLY - Pleasanton CA, US
Shahid SHAIKH - Santa Clara CA, US
Bok Hoen KIM - San Jose CA, US
Sergey STARIK - Kiev, UA
Ganesh BALASUBRAMANIAN - Sunnyvale CA, US
Xinhai HAN - Santa Clara CA, US
Michael Wenyoung TSIANG - Fremont CA, US
Masaki OGATA - San Jose CA, US
Zhijun JIANG - Sunnyvale CA, US
Juan Carlos ROCHA-ALVAREZ - San Carlos CA, US
Thomas NOWAK - Cupertino CA, US
Jianhua ZHOU - Campbell CA, US
Ramprakash SANKARAKRISHNAN - Santa Clara CA, US
Amit Kumar BANSAL - Milpitas CA, US
Jeongmin LEE - Sunnyvale CA, US
Todd EGAN - Fremont CA, US
Edward BUDIARTO - Fremont CA, US
Dmitriy PANASYUK - Santa Clara CA, US
Terrance Y. LEE - Oakland CA, US
Jian J. CHEN - Fremont CA, US
Mohamad A. AYOUB - Los Gatos CA, US
Heung Lak PARK - San Jose CA, US
Patrick REILLY - Pleasanton CA, US
Shahid SHAIKH - Santa Clara CA, US
Bok Hoen KIM - San Jose CA, US
Sergey STARIK - Kiev, UA
Ganesh BALASUBRAMANIAN - Sunnyvale CA, US
International Classification:
C23C 16/52
G01B 11/06
H01L 21/687
C23C 16/509
C23C 16/455
C23C 16/505
C23C 16/50
C23C 16/46
C23C 16/458
G01N 21/65
G01N 21/55
H01L 21/67
H01L 21/00
G01B 11/06
H01L 21/687
C23C 16/509
C23C 16/455
C23C 16/505
C23C 16/50
C23C 16/46
C23C 16/458
G01N 21/65
G01N 21/55
H01L 21/67
H01L 21/00
Abstract:
A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.
Pecvd Process
US Patent:
2018006, Mar 8, 2018
Filed:
Nov 3, 2017
Appl. No.:
15/802496
Inventors:
- Santa Clara CA, US
Xinhai HAN - Santa Clara CA, US
Michael Wenyoung TSIANG - Fremont CA, US
Masaki OGATA - San Jose CA, US
Zhijun JIANG - Sunnyvale CA, US
Juan Carlos ROCHA-ALVAREZ - San Carlos CA, US
Thomas NOWAK - Cupertino CA, US
Jianhua ZHOU - Campbell CA, US
Ramprakash SANKARAKRISHNAN - Santa Clara CA, US
Amit Kumar BANSAL - Milpitas CA, US
Jeongmin LEE - Sunnyvale CA, US
Todd EGAN - Fremont CA, US
Edward BUDIARTO - Fremont CA, US
Dmitriy PANASYUK - Santa Clara CA, US
Terrance Y. LEE - Oakland CA, US
Jian J. CHEN - Fremont CA, US
Mohamad A. AYOUB - Los Gatos CA, US
Heung Lak PARK - San Jose CA, US
Patrick REILLY - Pleasanton CA, US
Shahid SHAIKH - Santa Clara CA, US
Bok Hoen KIM - San Jose CA, US
Sergey STARIK - Kiev, UA
Ganesh BALASUBRAMANIAN - Sunnyvale CA, US
Xinhai HAN - Santa Clara CA, US
Michael Wenyoung TSIANG - Fremont CA, US
Masaki OGATA - San Jose CA, US
Zhijun JIANG - Sunnyvale CA, US
Juan Carlos ROCHA-ALVAREZ - San Carlos CA, US
Thomas NOWAK - Cupertino CA, US
Jianhua ZHOU - Campbell CA, US
Ramprakash SANKARAKRISHNAN - Santa Clara CA, US
Amit Kumar BANSAL - Milpitas CA, US
Jeongmin LEE - Sunnyvale CA, US
Todd EGAN - Fremont CA, US
Edward BUDIARTO - Fremont CA, US
Dmitriy PANASYUK - Santa Clara CA, US
Terrance Y. LEE - Oakland CA, US
Jian J. CHEN - Fremont CA, US
Mohamad A. AYOUB - Los Gatos CA, US
Heung Lak PARK - San Jose CA, US
Patrick REILLY - Pleasanton CA, US
Shahid SHAIKH - Santa Clara CA, US
Bok Hoen KIM - San Jose CA, US
Sergey STARIK - Kiev, UA
Ganesh BALASUBRAMANIAN - Sunnyvale CA, US
International Classification:
C23C 16/52
H01L 21/687
G01B 11/06
H01L 21/67
G01N 21/55
G01N 21/65
C23C 16/458
C23C 16/46
C23C 16/50
C23C 16/505
C23C 16/455
C23C 16/509
H01L 21/00
H01L 21/687
G01B 11/06
H01L 21/67
G01N 21/55
G01N 21/65
C23C 16/458
C23C 16/46
C23C 16/50
C23C 16/505
C23C 16/455
C23C 16/509
H01L 21/00
Abstract:
A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.
Ultra-Conformal Carbon Film Deposition
US Patent:
2017030, Oct 19, 2017
Filed:
Jun 28, 2017
Appl. No.:
15/636239
Inventors:
- Santa Clara CA, US
Shahid SHAIKH - Santa Clara CA, US
Pramit MANNA - Sunnyvale CA, US
Mandar B. PANDIT - Santa Clara CA, US
Tersem SUMMAN - San Jose CA, US
Patrick REILLY - Dublin CA, US
Deenesh PADHI - Sunnyvale CA, US
Bok Hoen KIM - San Jose CA, US
Heung Lak PARK - San Jose CA, US
Derek R. WITTY - Fremont CA, US
Shahid SHAIKH - Santa Clara CA, US
Pramit MANNA - Sunnyvale CA, US
Mandar B. PANDIT - Santa Clara CA, US
Tersem SUMMAN - San Jose CA, US
Patrick REILLY - Dublin CA, US
Deenesh PADHI - Sunnyvale CA, US
Bok Hoen KIM - San Jose CA, US
Heung Lak PARK - San Jose CA, US
Derek R. WITTY - Fremont CA, US
International Classification:
H01L 21/02
H01L 21/02
C23C 16/26
C23C 16/50
H01L 21/311
H01L 21/033
H01L 21/02
C23C 16/26
C23C 16/50
H01L 21/311
H01L 21/033
Abstract:
Embodiments of the disclosure relate to deposition of a conformal carbon-based material. In one embodiment, the method comprises depositing a sacrificial dielectric layer over a substrate, forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate, introducing a hydrocarbon source, a plasma-initiating gas, and a dilution gas into the processing chamber, generating a plasma in the processing chamber at a deposition temperature of about 80 C. to about 550 C. to deposit a conformal amorphous carbon layer on the patterned features and the exposed upper surface of the substrate, selectively removing the amorphous carbon layer from an upper surface of the patterned features and the upper surface of the substrate using an anisotropic etching process to provide the patterned features filled within sidewall spacers, and removing the patterned features formed from the sacrificial dielectric layer.
Pecvd Process
US Patent:
2017001, Jan 19, 2017
Filed:
Sep 28, 2016
Appl. No.:
15/278455
Inventors:
- Santa Clara CA, US
Xinhai HAN - Santa Clara CA, US
Michael Wenyoung TSIANG - Fremont CA, US
Masaki OGATA - San Jose CA, US
Zhijun JIANG - Sunnyvale CA, US
Juan Carlos ROCHA-ALVAREZ - San Carlos CA, US
Thomas NOWAK - Cupertino CA, US
Jianhua ZHOU - Campbell CA, US
Ramprakash SANKARAKRISHNAN - Santa Clara CA, US
Amit Kumar BANSAL - Milpitas CA, US
Jeongmin LEE - Sunnyvale CA, US
Todd EGAN - Fremont CA, US
Edward BUDIARTO - Fremont CA, US
Dmitriy PANASYUK - Santa Clara CA, US
Terrance Y. LEE - Oakland CA, US
Jian J. CHEN - Fremont CA, US
Mohamad A. AYOUB - Los Gatos CA, US
Heung Lak PARK - San Jose CA, US
Patrick REILLY - Dublin CA, US
Shahid SHAIKH - Santa Clara CA, US
Bok Hoen KIM - San Jose CA, US
Sergey STARIK - Kiev, UA
Ganesh BALASUBRAMANIAN - Sunnyvale CA, US
Xinhai HAN - Santa Clara CA, US
Michael Wenyoung TSIANG - Fremont CA, US
Masaki OGATA - San Jose CA, US
Zhijun JIANG - Sunnyvale CA, US
Juan Carlos ROCHA-ALVAREZ - San Carlos CA, US
Thomas NOWAK - Cupertino CA, US
Jianhua ZHOU - Campbell CA, US
Ramprakash SANKARAKRISHNAN - Santa Clara CA, US
Amit Kumar BANSAL - Milpitas CA, US
Jeongmin LEE - Sunnyvale CA, US
Todd EGAN - Fremont CA, US
Edward BUDIARTO - Fremont CA, US
Dmitriy PANASYUK - Santa Clara CA, US
Terrance Y. LEE - Oakland CA, US
Jian J. CHEN - Fremont CA, US
Mohamad A. AYOUB - Los Gatos CA, US
Heung Lak PARK - San Jose CA, US
Patrick REILLY - Dublin CA, US
Shahid SHAIKH - Santa Clara CA, US
Bok Hoen KIM - San Jose CA, US
Sergey STARIK - Kiev, UA
Ganesh BALASUBRAMANIAN - Sunnyvale CA, US
International Classification:
C23C 16/52
C23C 16/46
H01L 21/687
C23C 16/458
G01B 11/06
H01L 21/67
C23C 16/455
C23C 16/509
C23C 16/46
H01L 21/687
C23C 16/458
G01B 11/06
H01L 21/67
C23C 16/455
C23C 16/509
Abstract:
A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.
Possible Relatives
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