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James K Pan, 45Union City, CA

James Pan Phones & Addresses

Union City, CA   

Apex, NC   

San Francisco, CA   

San Leandro, CA   

Alameda, CA   

Oakland, CA   

Sioux Falls, SD   

Berkeley, CA   

Work

Company: Advance semiconductor engrg Address: 3590 Peterson Way, Santa Clara, CA 95054 Phones: 408-9866500 Position: Manager Industries: Electronic Parts and Equipment

Mentions for James K Pan

Career records & work history

Lawyers & Attorneys

James Pan Photo 1

James Pan - Lawyer

Office:
Smart & Biggar
Specialties:
Patents, Chemical & Industrial Biotechnology, Electrical/Electronics, Industrial/Mechanical, Software/Internet/Information Technologies, Cleantech, Life Sciences, Litigation, Trademarks, IP Management & Strategic Counselling, Industrial Designs, Licensing & IP Transactions, Copyright & Media, Energy
ISLN:
916958471
Admitted:
2002
University:
Tsinghua University, 1983; Tsinghua University, 1983; University of British Columbia, Ph.D.; University of British Columbia, Ph.D.; SR study of spin relaxation of small molecules in the gas phase
Law School:
University of British Columbia, J.D., 2001

Medicine Doctors

James Pan Photo 2

James Pan

Specialties:
Surgery
Vascular Surgery
Education:
Northeastern (2007)

James Pan resumes & CV records

Resumes

James Pan Photo 27

Md Candidate At Stanford University School Of Medicine

Position:
Creative Director at TEDxMidAtlantic, Designer at Freelance Graphic Designer, Principle Designer at Anjna Patient Education
Location:
San Francisco Bay Area
Industry:
Biotechnology
Work:
TEDxMidAtlantic - Washington DC since Jun 2011
Creative Director
Freelance Graphic Designer - Washington, DC since May 2011
Designer
Anjna Patient Education since Apr 2011
Principle Designer
Anjna Patient Education - Palo Alto, CA Feb 2013 - Jun 2013
Chief Research Officer
National Human Genome Research Institute Apr 2011 - Feb 2013
Post Bac Fellow
TEDxCMU 2010 - Mar 2012
President (Emeritus)
Carnegie Mellon University Aug 2010 - May 2011
Supplemental Instruction Leader
University of Pittsburgh Aug 2008 - May 2011
HHMI Academic Year Researcher
University of Pittsburgh Medical Center Jan 2011 - Apr 2011
Intern
National Institutes of Health - Bethesda, MD May 2009 - Aug 2010
Summer Resarch Intern
National Cancer Institute May 2008 - Aug 2008
Summer research intern
Columbia University Jul 2006 - May 2007
Researcher
Cornell University Nov 2004 - Jun 2006
Reseracher
Education:
Stanford University School of Medicine 2017
Doctor of Medicine (MD)
Carnegie Mellon University 2007 - 2011
BS, Biological Sciences
Bronx High School of Science 2003 - 2007
Interests:
Graphic Design, Typography, Apple products, Adobe Creative Suite
Honor & Awards:
2007: Junior Sciences and Humanities Symposium, Finalist 2007: New York Science and Engineering Fair, Finalist 2009 + 2010: NIH Summer Student Poster Day (2009) Analysis of the Arginine Rich Motif of HK022 Nun: Implications for the mechanisms of HIV1 Rev and Tat (2010) Functional and molecular characterization of the common haplotype in MDR1 2010: The American Society for Cell Biology Annual Meeting Poster: Human MDR1 common haplotype containing “silent” mutations cause protein conformation alternation and changes transepithelial permeability of anti-cancer drugs. (with Andy Fung, PhD & Michael Gottesman, MD) 2011: Carnegie Mellon Dean’s List Seven out of Seven Semesters 2011: Carnegie Mellon University, Graduated with University and College Honors 2011: Designer, "Anjna Patient Education" presented by Vineet Singal at TEDxTampaBay 2011: Designer, "Rare Diseases" presented by William Gahl at TEDxCMU
Certifications:
Radioactive Materials User, United States Nuclear Regulatory Commission
James Pan Photo 28

Design Engineer At Black & Veatch

Position:
Design Engineer at Black & Veatch
Location:
San Francisco Bay Area
Industry:
Civil Engineering
Work:
Black & Veatch
Design Engineer
James Pan Photo 29

James Pan

James Pan Photo 30

James Pan

James Pan Photo 31

James Pan

James Pan Photo 32

James Pan

James Pan Photo 33

James Pan

James Pan Photo 34

James Pan

Publications & IP owners

Us Patents

High Selectivity Etching Process For Oxides

US Patent:
6355182, Mar 12, 2002
Filed:
Feb 9, 2001
Appl. No.:
09/780166
Inventors:
Randhir Thakur - San Jose CA
James Pan - Boise ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
D44C 122
US Classification:
216 57
Abstract:
A process for etching oxides having differing densities which is not only highly selective, but which also produces uniform etches is provided and includes the steps of providing an oxide layer on a surface of a substrate, exposing the oxide layer to a liquid comprising a halide-containing species, and exposing the oxide layer to a gas phase comprising a halide-containing species. The process desirably is used to selectively etch a substrate surface in which the surface of the substrate includes on a first portion thereof a first silicon oxide and on a second portion thereof a second silicon oxide, with the first silicon oxide being relatively more dense than the second silicon oxide, such as, for example, a process which forms a capacitor storage cell on a semiconductor substrate.

Tumor Necrosis Factor Receptor Homologs And Nucleic Acids Encoding The Same

US Patent:
6534061, Mar 18, 2003
Filed:
Apr 12, 2000
Appl. No.:
09/548130
Inventors:
Audrey Goddard - San Francisco CA
James Pan - Belmont CA
Minhong Yan - Burlingame CA
Assignee:
Genentech, Inc. - South San Francisco CA
International Classification:
A61K 3900
US Classification:
4241921, 530350, 5303873, 530402, 530413, 536 234, 536 235, 4241781, 4241851, 514 2
Abstract:
The present invention is directed to novel polypeptides having homology to members of the tumor necrosis factor receptor family and to nucleic acid molecules encoding those polypeptides. Also provided herein are vectors and host cells comprising those nucleic acid sequences, chimeric polypeptide molecules comprising the polypeptides of the present invention fused to heterologous polypeptide sequences, antibodies which bind to the polypeptides of the present invention and to methods for producing the polypeptides of the present invention.

Secreted And Transmembrane Polypeptides And Nucleic Acids Encoding The Same

US Patent:
6723535, Apr 20, 2004
Filed:
Jul 16, 2001
Appl. No.:
09/906700
Inventors:
Avi Ashkenazi - San Mateo CA
David Botstein - Belmont CA
Luc Desnoyers - San Francisco CA
Dan L. Eaton - San Rafael CA
Napoleone Ferrara - San Francisco CA
Ellen Filvaroff - San Francisco CA
Sherman Fong - Alameda CA
Wei-Qiang Gao - Foster City CA
Hanspeter Gerber - San Francisco CA
Mary E. Gerritsen - San Mateo CA
Audrey Goddard - San Francisco CA
Paul J. Godowski - Burlingame CA
J. Christopher Grimaldi - San Francisco CA
Austin L. Gurney - Belmont CA
Kenneth J. Hillan - San Francisco CA
Ivar J. Kljavin - Lafayette CA
Jennie P. Mather - Millbrae CA
James Pan - Belmont CA
Nicholas F. Paoni - Belmont CA
Margaret Ann Roy - San Francisco CA
Timothy A. Stewart - San Francisco CA
Daniel Tumas - Orinda CA
P. Mickey Williams - Half Moon Bay CA
William I. Wood - Hillsborough CA
Assignee:
Genentech, Inc. - South San Francisco CA
International Classification:
C12N 1512
US Classification:
435 691, 435 6, 4353201, 435325, 530350, 536 235
Abstract:
The present invention is directed to novel polypeptides and to nucleic acid molecules encoding those polypeptides. Also provided herein are vectors and host cells comprising those nucleic acid sequences, chimeric polypeptide molecules comprising the polypeptides of the present invention fused to heterologous polypeptide sequences, antibodies which bind to the polypeptides of the present invention and to methods for producing the polypeptides of the present invention.

Engineered Metal Gate Electrode

US Patent:
6727560, Apr 27, 2004
Filed:
Feb 10, 2003
Appl. No.:
10/360719
Inventors:
James N. Pan - Santa Clara CA
Paul R. Besser - Sunnyvale CA
Christy Woo - Cupertino CA
Minh Van Ngo - Fremont CA
Jinsong Yin - Sunnyvale CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
H01L 2976
US Classification:
257412, 257388
Abstract:
A metal gate electrode is formed with an intrinsic electric field to modify its work function and the threshold voltage of the transistor. Embodiments include forming an opening in a dielectric layer by removing a removable gate, depositing one or more layers of tantalum nitride such that the nitrogen content increases from the bottom of the layer adjacent the gate dielectric layer upwardly. Other embodiments include forming the intrinsic electric field to control the work function by doping one or more metal layers and forming metal alloys. Embodiments further include the use of barrier layers when forming metal gate electrodes.

Methods For Improved Metal Gate Fabrication

US Patent:
6773978, Aug 10, 2004
Filed:
Aug 28, 2002
Appl. No.:
10/229690
Inventors:
Paul Raymond Besser - Sunnyvale CA
Eric Paton - Morgan Hill CA
James Pan - Santa Clara CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
H01L 218242
US Classification:
438238, 438257, 438210, 438275, 438224, 438229, 438231, 438286, 438305, 438346, 438301, 257407, 257408, 257757
Abstract:
Methods are disclosed for manufacturing semiconductor devices with silicide metal gates, wherein a single-step anneal is used to react a metal such as cobalt or nickel with substantially all of a polysilicon gate structure while source/drain regions are covered. A second phase conductive metal silicide is formed consuming substantially all of the polysilicon and providing a substantially uniform work function at the silicide/gate oxide interface.

Method For Independent Measurement Of Mosfet Source And Drain Resistances

US Patent:
6812730, Nov 2, 2004
Filed:
Mar 13, 2003
Appl. No.:
10/388081
Inventors:
James Pan - Santa Clara CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G01R 3126
US Classification:
324769, 324765
Abstract:
The source resistance of a MOSFET is determined by grounding the source and applying a voltage to the substrate to force a current I through the source. The gate and drain are allowed to float while the current is forced. Since no current flows between the source and drain, a voltage V detected at the drain is the product of the forced current I and the source resistance R. Accordingly, the source resistance R is determined to be the drain voltage V divided by the forced current I. Drain resistance R may be measured in an analogous manner.

Self Aligned Double Gate Transistor Having A Strained Channel Region And Process Therefor

US Patent:
6855982, Feb 15, 2005
Filed:
Feb 2, 2004
Appl. No.:
10/770163
Inventors:
Qi Xiang - San Jose CA, US
James N. Pan - Fishkill NY, US
Ming Ren Lin - Cupertino CA, US
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
H11L029/76
US Classification:
257330, 257 59, 438259, 438270, 438271, 438589
Abstract:
A method of manufacturing an integrated circuit with a strained semiconductor channel region. The method can provide a double gate structure. The gate structure can be provided in and above a trench. The trench can be formed in a compound semiconductor material such as a silicon-germanium material. The strained semiconductor can increase the charge mobility associated with the transistor. A silicon-on-insulator substrate can be used.

Methods For Fabricating Cmos-Compatible Lateral Bipolar Junction Transistors

US Patent:
6861325, Mar 1, 2005
Filed:
Sep 24, 2002
Appl. No.:
10/252681
Inventors:
James N. Pan - Santa Clara CA, US
Matthew Buynoski - Palo Alto CA, US
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
H01L021/8228
US Classification:
438325, 438327, 438366
Abstract:
A method for fabricating a lateral bipolar junction transistor in an active area of a substrate includes forming a base structure directly on a central portion of the active area without a gate oxide layer being formed on the substrate. The method also includes implanting a first type of dopant into the active area for forming an emitter region and a collector region, and forming contacts and interconnects for the base structure and emitter and collector regions.

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