James S W Simkins Deceased16522 135Th St, Redmond, WA 98052

7535789, May 19, 2009

Sep 27, 2006

11/528117

Thomas E. Fischaber - Golden CO, US
James M. Simkins - Park City UT, US
Peter H. Alfke - Los Altos Hills CA, US

Xilinx, Inc. - San Jose CA

G11C 8/00

36523005, 710 57, 326 46

Circuits and methods of concatenating first-in-first-out memory circuits (FIFOs). A concatenated FIFO includes first and second FIFOs. The data output terminals of the first FIFO are coupled to the data input terminals of the second FIFO. The read clock of the second FIFO is the system read clock, and the write clock of the first FIFO is the system write clock. Communication between the first and second FIFOs is controlled by the faster of the two system clocks. A control circuit coupled to both the first and second FIFOs has a local clock input terminal coupled to the read clock input terminal of the first FIFO and the write clock input terminal of the second FIFO. The control circuit is driven by status signals from the first and second FIFOs, and generates a read enable signal for the first FIFO and a write enable signal for the second FIFO.