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Binneg Y Lao, 7929722 Grandpoint Ln, Palos Verdes Estates, CA 90275

Binneg Lao Phones & Addresses

29722 Grandpoint Ln, Rancho Palos Verdes, CA 90275    310-5218992   

3449 Coolheights Dr, Rancho Palos Verdes, CA 90275    310-5218992   

Palos Verdes Peninsula, CA   

Lawndale, CA   

490 N Civic Dr #311, Walnut Creek, CA 94596    310-5218992   

103 W Torrance Blvd #102, Redondo Beach, CA 90277    310-5218992   

Los Angeles, CA   

Dimmitt, TX   

Otis Orchards, WA   

Mentions for Binneg Y Lao

Publications & IP owners

Us Patents

Multi-Gigabit-Per-Sec Clock Recovery Apparatus And Method For Optical Communications

US Patent:
6509801, Jan 21, 2003
Filed:
Jun 29, 2001
Appl. No.:
09/895955
Inventors:
Binneg Y. Lao - Rancho Palos Verdes CA
David A. Rowe - Torrance CA
James R. Pulver - Torrance CA
Assignee:
Sierra Monolithics, Inc. - Redondo Beach CA
International Classification:
H03L 700
US Classification:
331 17, 331 1 A
Abstract:
Methods and apparatus for generating clock signals accurately locked to multi-gigabits-per-second data signals received over fiber optic channels are disclosed. The invention includes a phase detector for comparing a data signal and a clock signal, a one shot unit for detecting a data transition, an XOR, a filter, a main charge pump, a compensating charge pump for producing additive or compensating current, and a VCO for generating the clock signal. The phase detector includes multiple D-flip flops. The one shot unit includes a delay unit and an AND gate. The filter includes a resistor, a capacitor and a negative resistance amplifier. The main charge pump includes differential inputs, double outputs, cross-quading resistors, differential NPN input transistors, and a current source. The compensating charge pump includes differential NPN input transistors and a current source. In operation, when there is a data transition and if the clock signal and data signal are out of phase synchronization, then the compensating charge pump will enhance the operation of the main charge pump, and the VCO will speed up or slow down the clock signal depending on whether the clock signal is advanced or retarded in phase compared to the data signal.

Ultra-Wideband Power Amplifier Module Apparatus And Method For Optical And Electronic Communications

US Patent:
6639461, Oct 28, 2003
Filed:
Aug 30, 2001
Appl. No.:
09/943588
Inventors:
Alan K. Tam - Irvine CA
Binneg Y. Lao - Rancho Palos Verdes CA
Assignee:
Sierra Monolithics, Inc. - Redondo Beach CA
International Classification:
H03F 338
US Classification:
330 10, 330 51, 330133, 330134, 330286, 330302, 330310
Abstract:
A broadband power amplifier module for high bit-rate SONET/SDH transmission channels, such as OC-192 and OC-768 applications. The power amplifier module, or also frequently referred to as modulator driver module, comprises amplifiers connected in series to amplify an input signal. A bias tee circuit is incorporated into the power amplifier module by connecting a conical shape inductor between the output stage of the amplifiers and the supply voltage and connecting a pair of blocking capacitors also at the output stage of the amplifiers. The conical shape inductor is adapted to provide high impedance over the entire bandwidth. The capacitors are adapted to provide high self-resonant frequency that is approaching or exceeding the bandwidth frequency. A power detection circuit can also be incorporated into the power amplifier module at the output stage of the amplifiers. The power detection circuit has a voltage divider circuit connected between the output stage and a ground supply.

Single And Multiple Layer Packaging Of High-Speed/High-Density Ics

US Patent:
6803252, Oct 12, 2004
Filed:
Nov 21, 2001
Appl. No.:
09/990247
Inventors:
Binneg Y. Lao - Rancho Palos Verdes CA
William W. Chen - Westchester CA
David A. Rowe - Torrance CA
Inho Kim - Palo Alto CA
Assignee:
Sierra Monolithics, Inc. - Redondo Beach CA
International Classification:
H01L 2144
US Classification:
438106, 438122, 438123
Abstract:
Methods and apparatus for providing connection packages for high-speed integrated circuits (âICsâ) in optical, electronic, wired or wireless communications are disclosed. The connection package achieves dimensional transformation of signal routes from high-speed, high-density ICs input/output pads to the external terminals such as coaxial terminals and BGA balls, while maintaining constant characteristic impedance throughout the transmission lines. A package may include a substrate having microstrips for communicating signals between the IC pads and external terminals. A pair of differential microstrips can be positioned closer to each other near the IC pads and create capacitive coupling. Such coupled capacitance allows the width of the microstrips to be reduced. A portion of the coupled microstrips near the IC pads can be widened to increase the capacitance so that the overall transmission path can become an all-pass networkâfrom the IC pads, through the bonding wires, to the microstrips.

Apparatus And Method For A Chip Assembly Including A Frequency Extending Device

US Patent:
8159052, Apr 17, 2012
Filed:
Jul 1, 2008
Appl. No.:
12/166173
Inventors:
Binneg Y. Lao - Rancho Palos Verdes CA, US
William W. Chen - Westchester CA, US
Assignee:
Semtech Corporation - Camarillo CA
International Classification:
H01L 23/52
H01L 21/00
US Classification:
257666, 257671, 257691, 257E23031, 257E23141, 257E23153, 438111, 438123
Abstract:
A chip assembly includes a chip, a paddle, an interface layer, a frequency extending device, and lands. The chip has contacts. The interface layer is disposed between the chip and the paddle. The frequency extending device has at least a conductive layer and a dielectric layer. The conductive layer has conductive traces. The frequency extending device is disposed adjacent to the side of the chip and overlying the paddle. The lands are disposed adjacent to the side of the paddle. The contacts are connected to the conductive traces. The conductive traces are connected to the lands. The frequency extending device is configured to reduce impedance discontinuity such that the impedance discontinuity produced by the frequency extending device is less than an impedance discontinuity that would be produced by bond wires each having a length greater than or substantially equal to the distance between the contacts and the lands.

Chip Assembly With Frequency Extending Device

US Patent:
8525313, Sep 3, 2013
Filed:
Mar 12, 2012
Appl. No.:
13/418201
Inventors:
Binneg Y. Lao - Rancho Palos Verdes CA, US
William W. Chen - Westchester CA, US
Assignee:
Semtech Corporation - Camarillo CA
International Classification:
H01L 23/495
US Classification:
257676, 257666, 257734, 257E23031, 257E23032, 257E23033, 257E23034, 257E23035
Abstract:
A chip assembly includes a chip, a paddle, an interface layer, a frequency extending device, and lands. The chip has contacts. The interface layer is disposed between the chip and the paddle. The frequency extending device has at least a conductive layer and a dielectric layer. The conductive layer has conductive traces. The frequency extending device is disposed adjacent to the side of the chip and overlying the paddle. The lands are disposed adjacent to the side of the paddle. The contacts are connected to the conductive traces. The conductive traces are connected to the lands. The frequency extending device is configured to reduce impedance discontinuity such that the impedance discontinuity produced by the frequency extending device is less than an impedance discontinuity that would be produced by bond wires each having a length greater than or substantially equal to the distance between the contacts and the lands.

Connection Package For High-Speed Integrated Circuit

US Patent:
2003009, May 22, 2003
Filed:
Nov 21, 2001
Appl. No.:
09/990144
Inventors:
Binneg Lao - Rancho Palos Verdes CA, US
William Chen - Westchester CA, US
David Rowe - Torrance CA, US
International Classification:
H03H007/38
US Classification:
333/033000, 333/247000, 333/260000
Abstract:
Connection packages for high-speed integrated circuits (“ICs”) in optical, electronic, wired or wireless communications are disclosed. The connection package achieves dimensional transformation of signal routes from high-speed, high-density IC's input/output pads to the external terminals such as coaxial terminals and BGA balls, while maintaining constant characteristic impedance throughout the transmission lines. A package may include a substrate having microstrips for communicating signals between the IC pads and external terminals. A pair of differential microstrips can be positioned closer to each other near the IC pads and create capacitive coupling. Such coupled capacitance allows the width of the microstrips to be reduced. A portion of the coupled microstrips near the IC pads can be widened to increase the capacitance so that the overall transmission path can become an all-pass network—from the IC pads, through the bonding wires, to the microstrips. The rest of the portions of the microstrips can be tapered out to their respective external connectors. In addition, a multi-layer package may include a substrate, at least one coaxial external terminal formed at the side of the package for conducting a high-speed signal, BGA connectors formed at the bottom of the package for conducting low-speed signals, a microstrip for connecting the high-speed signal to the coaxial terminal, and microstrips and internal coaxial connectors for connecting the low-speed signals to the BGA connectors. Substantially constant characteristic impedance is achieved throughout the signal transmission paths in the package.

Surface Acoustic Wave Gyroscope

US Patent:
4384409, May 24, 1983
Filed:
Oct 18, 1980
Appl. No.:
6/195027
Inventors:
Binneg Y. Lao - Rancho Palos Verdes CA
Assignee:
The Bendix Corporation - Southfield MI
International Classification:
G01P 344
US Classification:
33318
Abstract:
A surface acoustic wave gyroscope which detects a change in the propagation velocity of a surface acoustic wave as a function of the rotational velocity of a medium on whose surface the acoustic wave is propogated, is disclosed. In a first embodiment using a fixed frequency oscillator to generate the surface acoustic wave, the change in the propagation velocity is detected as a phase shift between the generated and detected waves. In an alternate embodiment the detected surface acoustic wave is used as a feedback signal to an amplifier to form an oscillator whose frequency varies as a function of the surface waves propagation velocity. In the preferred embodiment, two surface acoustic waves are generated in opposite directions about the cylindrical surface of a substrate.

Superconducting Gyroscope

US Patent:
5406847, Apr 18, 1995
Filed:
Mar 16, 1994
Appl. No.:
8/210085
Inventors:
David A. Rowe - Torrance CA
Binneg Y. Lao - Rancho Palos Verdes CA
Assignee:
Sierra Monolithics, Inc. - Redondo CA
International Classification:
G01P 344
US Classification:
73504
Abstract:
A superconducting gyroscope of the present invention includes a circuit which produces a magnetic field which is synchronous with the rate of rotation experienced by the gyroscope, a sensing circuit for converting the synchronous magnetic field into an electric signal, a first shield made of superconducting material for performing shielding of external stray fields, and a second shield disposed inside the first shield and made of superconducting material for expelling trapped residual magnetic flux. The synchronous magnetic field producing circuit includes a magnetic core shaped in a toroid with an air gap. The magnetic core may alternatively be formed in meandering shape by a plurality of separate magnetic core members with a plurality of air gaps therebetween. The sensing circuit includes at least one SQUID which can be directly coupled to the magnetic core. The sensing circuit may also include a superconducting pick-up coil surrounding a portion of the magnetic core for picking up the synchronous magnetic field and producing a London field, and an input coil magnetically coupled to the SQUID.

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