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Jerold A Lee Deceased1718 Pass Rd, Biloxi, MS 39531

Jerold Lee Phones & Addresses

1718 Pass Rd, Biloxi, MS 39531    228-4363853   

282 Big Lake Rd, Biloxi, MS 39531    228-3884052   

221 Eisenhower Dr, Biloxi, MS 39531    228-3850811   

Los Altos, CA   

Gulfport, MS   

701 Rickenbacker Dr, Sun City Center, FL 33573   

Bay Saint Louis, MS   

Orange Beach, AL   

1718 Pass Rd LOT 46, Biloxi, MS 39531    228-4243477   

Work

Position: Building and Grounds Cleaning and Maintenance Occupations

Education

Degree: High school graduate or higher

Mentions for Jerold A Lee

Publications & IP owners

Us Patents

High Power, Wide Bandwidth Operational Amplifier

US Patent:
6819176, Nov 16, 2004
Filed:
Jul 11, 2003
Appl. No.:
10/617463
Inventors:
Jerold Lee - Los Altos CA
Assignee:
Remec, Inc. - Del Mar CA
International Classification:
H03F 100
US Classification:
330151, 330124 R, 330295, 330292, 330279
Abstract:
A high bandwidth operational amplifier architecture has three control loops, which are combined via a voltage-follower-configured field effect transistor. The first control loop is an instantaneous main amplification path and employs positive feedback-based Vgs correction of the output transistor. The second control loop has a bandwidth considerably lower than the first loop and employs negative feedback to correct for long term drift errors. The third control loop, utilizing negative feedback, is a fast path having a bandwidth that overlaps the bandwidth of the first control loop, and corrects for overshoot and undershoot in the main amplification path.

Thermally Enhanced Ball Grid Array Package Formed In Strip With One-Piece Die-Attached Exposed Heat Spreader

US Patent:
7692276, Apr 6, 2010
Filed:
Aug 9, 2007
Appl. No.:
11/836582
Inventors:
Jerold Lee - Union City CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H01L 23/495
US Classification:
257676, 257666, 257673, 438111, 438118
Abstract:
Methods, systems, and apparatuses for integrated circuit packages, such as ball grid array packages, and processes for assembling the same, are provided. A first strip includes an array of package substrate sections. An IC die is mounted to each package substrate section of the first strip. A second strip includes an array of leadframe sections. The second strip is positioned adjacent to the first strip to couple a planar protruding area of each leadframe section to a corresponding IC die mounted to the first strip. An encapsulating material is applied to the adjacently positioned first and second strips to fill a space between the first and second strips and to fill a cavity in a top surface of each leadframe section. A planar region of the first strip surrounding each centrally located cavity is not covered by the encapsulating material. The adjacently positioned first and second strips are singulated into a plurality of IC packages.

Oscillator Circuit Having Reduced Phase Noise

US Patent:
6462627, Oct 8, 2002
Filed:
Aug 25, 2000
Appl. No.:
09/648914
Inventors:
Jerold Lee - Los Altos CA
Assignee:
Tropian Inc. - Cupertino CA
International Classification:
H03B 512
US Classification:
331117R, 331117 FE, 331167, 331175
Abstract:
The present invention, generally speaking, allows for a substantial reduction in oscillator phase noise by modifying the transfer function of a portion of the oscillator, e. g. , by adding a zero to the transfer function. Modifying the transfer function reduces the open-loop gain of the oscillator but achieves a desired phase compensation, allowing the oscillator to be operated at the resonance of the resonator instead of off resonance. In an exemplary embodiment, the transfer function is modified by choosing a capacitance value such that, instead of operating as a bypass at the frequency of interest, adds a zero to the transfer function of the oscillator and causes a change in frequency characteristics, achieving an increase in the effective Q of the oscillator. This increase in effective Q translates directly into reduced phase noise. Phase noise improvement in the range of 3dB has been demonstrated.

Electronic Device

US Patent:
2021013, May 6, 2021
Filed:
Oct 30, 2020
Appl. No.:
17/085465
Inventors:
- Co. Limerick, IE
George Anthony Serpa - San Jose CA, US
Jerold Lee - Union City CA, US
International Classification:
H01F 27/08
H01F 27/28
H01F 27/24
Abstract:
An electronic device is disclosed. The electronic device can include an electronic component. The electronic device can include a shaped body in which the electronic component is at least partially embedded, the shaped body comprising a base portion and a plurality of heat-dissipating projections extending outwardly therefrom. In some embodiments, the electronic device can include a passive electronic device, such as an inductor or transformer.

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