Jerry Yu LoAlhambra, CA

2012020, Aug 9, 2012

Feb 4, 2011

13/021456

ERICK O. ABASTO - Mission Viejo CA, US
JERRY LO - Hacienda Heights CA, US

WESTERN DIGITAL TECHNOLOGIES, INC. - Irvine CA

G06F 12/00

711103, 711E12008

A non-volatile semiconductor memory is disclosed comprising N memory devices each comprising a plurality of blocks, wherein each block comprises a plurality of memory segments accessed through an address. A searched is performed by issuing a read command for each of the N memory devices, wherein an address of each read command is separated by a distance determined in response to the search range of addresses and N, and the search range of addresses is greater than N. Data read from at least one of the memory devices is evaluated to determine whether the search has finished.

2021014, May 13, 2021

Jan 20, 2021

17/153713

- San Jose CA, US
Eugene LISITSYN - Anaheim CA, US
Jerry LO - Hacienda Heights CA, US
Subhash Balakrishna PILLAI - Irvine CA, US

G06F 3/06
G06F 12/02

The subject technology provides for managing a data storage system. A host write command to write host data associated with a logical address to a non-volatile memory is received. A first physical address in the non-volatile memory mapped to the logical address in an address mapping table is determined. An indicator that the first physical address is bad checked. If the first physical address is indicated as bad, a valid count associated with a first set of physical addresses at a current value is maintained. The first set of physical addresses comprises the first physical address. If the first physical address is not indicated as bad, the first physical address is marked as invalid. The valid count associated with the first set of physical addresses is decremented.

2019034, Nov 14, 2019

Jul 26, 2019

16/523956

- San Jose CA, US
Eugene LISITSYN - Anaheim CA, US
Jerry LO - Hacienda Heights CA, US
Subhash Balakrishna PILLAI - Irvine CA, US

G06F 3/06
G06F 12/02

The subject technology provides for managing a data storage system. A host write command to write host data associated with a logical address to a non-volatile memory is received. A first physical address in the non-volatile memory mapped to the logical address in an address mapping table is determined. An indicator that the first physical address is bad checked. If the first physical address is indicated as bad, a valid count associated with a first set of physical addresses at a current value is maintained. The first set of physical addresses comprises the first physical address. If the first physical address is not indicated as bad, the first physical address is marked as invalid. The valid count associated with the first set of physical addresses is decremented.

2019025, Aug 15, 2019

Apr 17, 2019

16/387413

- San Jose CA, US
Eugene LISITSYN - Anaheim CA, US
Jerry LO - Hacienda Heights CA, US
Subhash Balakrishna PILLAI - Irvine CA, US

G06F 12/0804
G06F 12/02
G06F 11/14
G06F 12/0868
G06F 1/30

Host data segments are received and stored in a cached data unit corresponding to a previously stored data unit currently stored in non-volatile memory. Metadata is created that identifies unmodified previously stored segments of host data in the previously stored data unit that correspond to the received host data segments, the metadata including an update flag indicating that the previously stored data unit requires updating. In response to detecting the unexpected interruption of power, the cached data unit and the metadata is written to an area of the non-volatile memory array that is different than where the previously stored data unit is currently stored. Upon resuming operation following the unexpected interruption of power, the cached data unit is identified based on the update flag, as having been saved in response to the power shutdown without the previously stored data unit being updated in the non-volatile memory array, and then reloaded into the memory cache.

2018037, Dec 27, 2018

Jul 31, 2017

15/664667

- San Jose CA, US
Eugene LISITSYN - Anaheim CA, US
Jerry LO - Hacienda Heights CA, US
Subhash Balakrishna PILLAI - Irvine CA, US

G06F 3/06
G06F 12/02

The subject technology provides for managing a data storage system. A host write command to write host data associated with a logical address to a non-volatile memory is received. A first physical address in the non-volatile memory mapped to the logical address in an address mapping table is determined. An indicator that the first physical address is bad checked. If the first physical address is indicated as bad, a valid count associated with a first set of physical addresses at a current value is maintained. The first set of physical addresses comprises the first physical address. If the first physical address is not indicated as bad, the first physical address is marked as invalid. The valid count associated with the first set of physical addresses is decremented.

2018032, Nov 15, 2018

May 11, 2017

15/593206

- San Jose CA, US
Eugene LISITSYN - Anaheim CA, US
Jerry LO - Hacienda Heights CA, US
Subhash Balakrishna PILLAI - Irvine CA, US

G06F 12/0804
G06F 11/14

Host data segments are received and stored in a cached data unit corresponding to a previously stored data unit currently stored in non-volatile memory. Metadata is created that identifies unmodified previously stored segments of host data in the previously stored data unit that correspond to the received host data segments, the metadata including an update flag indicating that the previously stored data unit requires updating. In response to detecting the unexpected interruption of power, the cached data unit and the metadata is written to an area of the non-volatile memory array that is different than where the previously stored data unit is currently stored. Upon resuming operation following the unexpected interruption of power, the cached data unit is identified based on the update flag, as having been saved in response to the power shutdown without the previously stored data unit being updated in the non-volatile memory array, and then reloaded into the memory cache.

2018018, Jul 5, 2018

Dec 29, 2016

15/394560

- Irvine CA, US
Hung-min Chang - Irvine CA, US
Haining Liu - Irvine CA, US
Jerry Lo - Hacienda Heights CA, US
Hung-Cheng Yeh - Irvine CA, US

G06F 3/06
G11C 16/34
G06F 11/00

Aspects of the disclosure provide methods and apparatus that monitor and mitigate Read Disturb errors in non-volatile memory (NVM) devices such as NAND flash memories. The disclosed methods and apparatus determine which logical block addresses (LBAs) in the NVM device are frequently accessed by a host, rather than looking a physical address accesses. The potential Read Disturb errors may then be mitigated by triggering Read Disturb mitigation when the numbers of access of one or more of the frequently accessed LBAs exceeds a predefined number of accesses.

2018019, Jul 5, 2018

Dec 30, 2016

15/396206

- Irvine CA, US
Aldo Giovanni Cometti - San Diego CA, US
Haining Liu - Irvine CA, US
Jerry Lo - Hacienda Heights CA, US

G11C 16/34
G06F 3/06
G06F 11/10
G11C 29/52
H03M 13/11

Aspects of the disclosure provide methods and apparatus for handling Read Disturb and block errors in a non-volatile memory (NVM) device. An error level of both an aggressor page that causes Read Disturb errors and an error level of adjacent victim pages are obtained. The error level of the victim page is compared against a predetermined threshold error level to determine if the victim page is experiencing a high level of bit errors. If so, then the error level of the aggressor page is compared to the error level of the victim page to determine whether Read Disturb errors are actually occurring due to host reads of the aggressor page. By looking at both the aggressor and victim error levels, a more accurate determination of Read Disturb errors may be obtained, resulting in less unnecessary relocations of pages and blocks within an NVM for mitigating Read Disturb effects.