Jian Huang, 504901 Seminary Rd UNIT 810, Alexandria, VA 22311

2007027, Dec 6, 2007

Jun 6, 2006

11/448367

Jian Huang - East Longmeadow MA, US

A47K 3/024

45721

A bathtub for infants and children that can be placed within another standard bathtub such as a regular bathtub. The bathtub has a set of supports that suspend the bathtub above the bottom of the standard bathtub to that the baby bathtub can be reach easily by an adult. The purpose is to increase the comfort of the adult washing the infant or child and to help the adult protect the infant or child from harm.

2021015, May 27, 2021

Nov 26, 2019

16/696108

- Santa Clara CA, US
Jiasheng CHEN - Orlando FL, US
Jian HUANG - Orlando FL, US

G06F 9/30
G06F 9/48
G06F 7/57

A graphics processing unit (GPU) sequences provision of operands to a set of operand registers, thereby allowing the GPU to share at least one of the operand registers between processing. The GPU includes a plurality of arithmetic logic units (ALUs) with at least one of the ALUs configured to perform double precision operations. The GPU further includes a set of operand registers configured to store single precision operands. For a plurality of executing threads that request double precision operations, the GPU stores the corresponding operands at the operand registers. Over a plurality of execution cycles, the GPU sequences transfer of operands from the set of operand registers to a designated double precision operand register. During each execution cycle, the double-precision ALU executes a double precision operation using the operand stored at the double precision operand register.

2021015, May 27, 2021

Nov 27, 2019

16/697660

- Santa Clara CA, US
Bin HE - Orlando FL, US
Jian HUANG - Orlando FL, US
Michael MANTOR - Orlando FL, US

G06F 9/30
G06F 9/48

A processor includes a plurality of vector sub-processors (VSPs) and a plurality of memory banks dedicated to respective VSPs. A first memory bank corresponding to a first VSP includes a first plurality of high vector general purpose register (VGPR) banks and a first plurality of low VGPR banks corresponding to the first plurality of high VGPR banks. The first memory bank further includes a plurality of operand gathering components that store operands from respective high VGPR banks and low VGPR banks. The operand gathering components are assigned to individual threads while the threads are executed by the first VSP.

2021008, Mar 25, 2021

Sep 24, 2019

16/581252

- Santa Clara CA, US
Michael MANTOR - Orlando FL, US
Jiasheng CHEN - Orlando FL, US
Jian HUANG - Orlando FL, US

G06F 9/30
G06F 17/16
G06F 9/54
G06F 9/38

A processing unit such as a graphics processing unit (GPU) includes a plurality of vector signal processors (VSPs) that include multiply/accumulate elements. The processing unit also includes a plurality of registers associated with the plurality of VSPs. First portions of first and second matrices are fetched into the plurality of registers prior to a first round that includes a plurality of iterations. The multiply/accumulate elements perform matrix multiplication and accumulation on different combinations of subsets of the first portions of the first and second matrices in the plurality of iterations prior to fetching second portions of the first and second matrices into the plurality of registers for a second round. The accumulated results of multiplying the first portions of the first and second matrices are written into an output buffer in response to completing the plurality of iterations.