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James Allen Rench, 728531 Buffalo Dr, Lantana, TX 76226

James Rench Phones & Addresses

1281 Fm 1830, Argyle, TX 76226   

Lantana, TX   

1409 Lynhurst Ln, Denton, TX 76205    940-3821187   

2104 Shenandoah Trl, Denton, TX 76210    940-3821187   

Work

Company: Alexocor business solutions inc 2010 Position: Director of business services & project manager

Education

School / High School: National College Feb 2007

Mentions for James Allen Rench

James Rench resumes & CV records

Resumes

James Rench Photo 16

James Rench

James Rench Photo 17

James Rench

Location:
United States
James Rench Photo 18

James Rench - Mansfield, TX

Work:
ALEXOCOR BUSINESS SOLUTIONS INC 2010 to 2000
Director of Business Services & Project Manager
PITNEY BOWES, INC 2007 to 2010
Area Solution Manager/Area Service Manager - Southwest Area
SOUTH ARLINGTON PRIMARY CARE ASSOCIATES - Arlington, TX 2005 to 2007
Administrator & Business Director
PITNEY BOWES, INC - Fort Worth, TX 1999 to 2005
Regional Pre Sales Solutions Specialist & Network Admin
PITNEY BOWES, INC 1996 to 2005 Enterprise Division - US Central Region 1996 to 1997
Project Manager

Publications & IP owners

Us Patents

Circuit Combining Functions Of Cyclic Redundancy Check Code And Pseudo-Random Number Generators

US Patent:
4771429, Sep 13, 1988
Filed:
Sep 18, 1986
Appl. No.:
6/908541
Inventors:
Charles L. Davis - Flower Mound TX
Jerry R. Sanders - Dallas TX
James A. Rench - Grand Prairie TX
Assignee:
Abbott Laboratories - Abbott Park IL
International Classification:
G06F 1110
H03K 384
US Classification:
371 27
Abstract:
A circuit is disclosed which combines the functions of a cyclic redundancy check code (CRCC) generator and a pseudo-random number generator in such a way that common elements are shared rather than duplicated. A 16-stage shift register and two linear feedback paths are included for the CRCC and pseudo-random number generators. A control section of the circuit controls the mode of operation of the circuit according to the state of a mode control signal. A signal on a clear line resets the shift register or initializes it with a selected value depending on the state of the mode control signal. The mode control signal also controls the input of data on a data line and the output of generated CRC and pseudo-random access codes on output lines.

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