Joe Randy Guerra, 62239 Fullerton Ave, Henderson, NV 89015
Joe Guerra Phones & Addresses
239 Fullerton Ave, Henderson, NV 89015
Las Cruces, NM
El Cajon, CA
516 Paraiso Ave, Spring Valley, CA 91977
Las Vegas, NV
Imperial Bch, CA
Mentions for Joe Randy Guerra
Publications & IP owners
Us Patents
Miniature Circuitry And Inductive Components And Methods For Manufacturing Same
US Patent:
7602272, Oct 13, 2009
Filed:
Aug 24, 2007
Appl. No.:
11/895447
Inventors:
Ronald W. Whittaker - Escondido CA, US
Joe D Guerra - Lake Forest CA, US
Ciprian Marcoci - Anaheim CA, US
Joe D Guerra - Lake Forest CA, US
Ciprian Marcoci - Anaheim CA, US
Assignee:
Multi-Fineline Electronix, Inc. - Anaheim CA
International Classification:
H01F 5/00
US Classification:
336200
Abstract:
Miniature circuitry and inductor components in which multiple levels of printed circuitry are formed on each side of a support panel, typically a printed circuit board or rigid flex. Electrical connection between the plural levels of circuitry and multiple windings around magnetic members are provided by plural plated through hole conductors. Small through hole openings accommodate a plurality of the plated through hole conductors since each is insulated from the others by a very thin layer of vacuum deposited organic layer such as parylene having a high dielectric strength. Adhesion of this plated copper to the organic layer is provided by first applying an adhesive promotor to the surface of the organic layer followed by the vacuum deposition of the organic layer.
Miniature Circuitry And Inductive Components And Methods For Manufacturing Same
US Patent:
7656263, Feb 2, 2010
Filed:
Sep 18, 2008
Appl. No.:
12/233553
Inventors:
Ronald W. Whittaker - Escondido CA, US
Joe D. Guerra - Lake Forest CA, US
Ciprian Marcoci - Anaheim CA, US
Joe D. Guerra - Lake Forest CA, US
Ciprian Marcoci - Anaheim CA, US
Assignee:
Multi-Fineline Electronix, Inc. - Anaheim CA
International Classification:
H01F 5/00
US Classification:
336200
Abstract:
Miniature circuitry and inductor components in which multiple levels of printed circuitry are formed on each side of a support panel, typically a printed circuit board or rigid flex. Magnetic members are embedded in one or more cavities in said support panel. Electrical connection between the plural levels of circuitry and multiple windings around the magnetic members are provided by plural plated through hole conductors. Small through hole openings accommodate a plurality of the plated through hole conductors since each is insulated from the others by a very thin layer of vacuum deposited organic layer such as parylene having a high dielectric strength. Adhesion of this plated copper to the organic layer is provided by first applying an adhesive promotor to the surface of the organic layer followed by the vacuum deposition of the organic layer.
Methods For Manufacturing Miniature Circuitry And Inductive Components
US Patent:
7690110, Apr 6, 2010
Filed:
Aug 24, 2007
Appl. No.:
11/895355
Inventors:
Ronald W. Whittaker - Escondido CA, US
Joe D Guerra - Lake Forest CA, US
Ciprian Marcoci - Anaheim CA, US
Joe D Guerra - Lake Forest CA, US
Ciprian Marcoci - Anaheim CA, US
Assignee:
Multi-Fineline Electronix, Inc. - Anaheim CA
International Classification:
H05K 3/42
US Classification:
29852, 29847, 174264, 427 972
Abstract:
A method for making plural plated through holes in a single circuit board via is provided. The method includes plating copper in the walls of said circuit board via to form a first plated through hole and applying a thin layer of first adhesive promotor to the surface of said plated via. The method further includes vacuum depositing an organic layer having a high dielectric strength unto said layer of first adhesive promoter and applying a second layer of adhesive promoter over said organic layer. The method even further includes plating copper over said second layer of adhesive promoter to form a second plated through hole in said circuit board via.
Miniature Circuitry And Inductive Components And Methods For Manufacturing Same
US Patent:
2006015, Jul 13, 2006
Filed:
Dec 7, 2005
Appl. No.:
11/296579
Inventors:
Ronald Whittaker - Escondido CA, US
Joe Guerra - Lake Forest CA, US
Ciprian Marcoci - Anaheim CA, US
Joe Guerra - Lake Forest CA, US
Ciprian Marcoci - Anaheim CA, US
International Classification:
H01F 5/00
US Classification:
336200000
Abstract:
Miniature circuitry and inductor components in which multiple levels of printed circuitry are formed on each side of a support panel, typically a printed circuit board or rigid flex. Electrical connection between the plural levels of circuitry and multiple windings around magnetic members are provided by plural plated through hole conductors. Small through hole openings accommodate a plurality of the plated through hole conductors since each is insulated from the others by a very thin layer of vacuum deposited organic layer such as parylene having a high dielectric strength. Adhesion of this plated copper to the organic layer is provided by first applying an adhesive promotor to the surface of the organic layer followed by the vacuum deposition of the organic layer.
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