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John H Dungan, 639081 N Mill Creek Cv, Cedar Hills, UT 84062

John Dungan Phones & Addresses

Cedar Hills, UT   

Hillsboro, OR   

19633 104Th St, Renton, WA 98055   

Kent, WA   

346 NE Merle Ct, Hillsboro, OR 97124   

Mentions for John H Dungan

Career records & work history

Medicine Doctors

John R. Dungan

Specialties:
Anesthesiology
Work:
Hastings Anesthesiology Associates
420 W 5 St STE 101, Hastings, NE 68901
402-4639841 (phone) 402-4639846 (fax)
Education:
Medical School
Creighton University School of Medicine
Graduated: 1989
Languages:
English
Description:
Dr. Dungan graduated from the Creighton University School of Medicine in 1989. He works in Hastings, NE and specializes in Anesthesiology. Dr. Dungan is affiliated with Mary Lanning Healthcare.

John Dungan resumes & CV records

Resumes

John Dungan Photo 38

John Dungan

Location:
Portland, Oregon Area
Industry:
Electrical/Electronic Manufacturing
John Dungan Photo 39

Executive Director At United Way Of Adair County And Northeast Missouri

Position:
Executive Director at United Way of Adair County and Northeast Missouri
Location:
Kirksville, Missouri
Industry:
Nonprofit Organization Management
Work:
United Way of Adair County and Northeast Missouri since Jun 2010
Executive Director
First Christian Church of Kirksville Dec 2001 - Jun 2010
Pastor
Red Top Christian Church Jul 2000 - Nov 2001
Interim Pastor
Orchard Street Christian Church Jun 1992 - Jul 2000
Pastor
Education:
University of Chicago 1987 - 1991
M. Div., Ministry/Service and Ethics
Texas Christian University 1982 - 1986
B.A., Religion Studies and Political Science
John Dungan Photo 40

John Dungan

Location:
United States

Publications & IP owners

Us Patents

Coupon Registration Mechanism And Method

US Patent:
6667090, Dec 23, 2003
Filed:
Sep 26, 2001
Appl. No.:
09/962152
Inventors:
David W. Boggs - Hillsboro OR
Rebecca A. Jessep - Dallas OR
Carolyn McCormick - Hillsboro OR
Daryl A. Sato - Beaverton OR
John H. Dungan - Hillsboro OR
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
B32B 310
US Classification:
428131, 428 666, 428209, 428901
Abstract:
A registration coupon is provided for a printed circuit board or other substrate. The registration coupon may be used to determine a hole-to-outer layer feature registration and a solder mask registration. The registration coupon may include a registration hole provided on the circuit board, a metal pad and an anti-pad provided on the circuit board about the registration hole, and a solder mask covering the metal pad.

Pcb Design And Method For Providing Vented Blind Vias

US Patent:
6787443, Sep 7, 2004
Filed:
May 20, 2003
Appl. No.:
10/442834
Inventors:
David W. Boggs - Hillsboro OR
John H. Dungan - Hillsboro OR
Gary I. Paek - Banks OR
Daryl A. Sato - Portland OR
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 2144
US Classification:
438612, 438115, 438613, 438614, 29852
Abstract:
An apparatus and method for providing a vented blind via in pad of a printed circuit board (PCB). A vent in the blind via in pad to allow gases formed during reflow soldering to escape from the solder joint. In one embodiment, the vent extends from the outer edge of the pad to the blind via. In another embodiment, a method includes forming a blind via in pad having a vent.

Standoff Devices And Methods Of Using Same

US Patent:
6941537, Sep 6, 2005
Filed:
Feb 7, 2002
Appl. No.:
10/067244
Inventors:
Rebecca A. Jessep - Dallas OR, US
David W. Boggs - Hillsboro OR, US
Carolyn McCormick - Hillsboro OR, US
John H. Dungan - Hillsboro OR, US
Daryl A. Sato - Beaverton OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F017/50
US Classification:
716 15, 716 1
Abstract:
A standoff device provides predetermined control of a standoff distance between electrical components mounted together with opposing conductive grid array patterns. In an embodiment, a predetermined electrical function is provided by the device to at least one of the electrical components. The standoff device comprises a plurality of rigid one-piece standoff pins which, in an embodiment, contains one or more stops which buttress against the electrical components to serve as a distancing control structure. In an embodiment, the standoff device is integral with one of the electrical components.

Arrangement Of Vias In A Substrate To Support A Ball Grid Array

US Patent:
7061116, Jun 13, 2006
Filed:
Sep 26, 2001
Appl. No.:
09/962254
Inventors:
Carolyn McCormick - Hillsboro OR, US
Rebecca Jessep - Dallas OR, US
John Dungan - Hillsboro OR, US
David W. Boggs - Hillsboro OR, US
Daryl Sato - Beaverton OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 23/48
H01L 23/52
H01L 29/40
US Classification:
257773
Abstract:
An arrangement of pads with selective via in pad for mounting a semiconductor package on a substrate. In order to strengthen the soldered bonds, standard pads, which have a stronger bond, are used in locations of greatest stress and deflection. Vias in pad (VIP) are used at all other locations to improve routing advantages due to their smaller surface area.

Pcb Method And Apparatus For Producing Landless Interconnects

US Patent:
7084354, Aug 1, 2006
Filed:
Jun 14, 2002
Appl. No.:
10/173329
Inventors:
David W. Boggs - Hillsboro OR, US
Daryl A. Sato - Beaverton OR, US
John H. Dungan - Hillsboro OR, US
Gary I. Paek - Banks OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H05K 1/11
H05K 1/14
US Classification:
174262, 174260, 29830, 361803
Abstract:
An electronic assembly is disclosed. The electronic assembly includes a lower portion and a first elongate trace formed on an upper surface of the lower portion. The trace is covered by an upper portion, and an opening formed through an upper surface of the upper portion extends to the trace to expose a portion of the trace. A second elongate trace is formed on the upper portion. A portion of the second elongate trace positioned in the opening formed through the upper surface of the upper portion contacts the first elongate trace through the opening to form an electrical interconnection between the first trace and the second trace.

Three-Dimensional Flexible Interposer

US Patent:
7201583, Apr 10, 2007
Filed:
Dec 31, 2003
Appl. No.:
10/749818
Inventors:
David W. Boggs - Hillsboro OR, US
John H. Dungan - Hillsboro OR, US
Frank A. Sanders - Beaverton OR, US
Daryl A. Sato - Portland OR, US
Dan Willis - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01R 12/00
H05K 1/00
US Classification:
439 66
Abstract:
A generally planar interposer having a plurality of interposer contact pads to contact a plurality of first contacts of a first electronic device on one side of the interposer, and a plurality of electrical connections between the interposer contact pads and a plurality of pressure contacts on the other side of the interposer. Each of the pressure contacts having a directionally deformable contact surface to removably contact a plurality of second contacts of a second electronic device on the other side of the interposer. Also methods of forming the interposer.

Electronic Packaging Using Conductive Interposer Connector

US Patent:
7241680, Jul 10, 2007
Filed:
Apr 30, 2004
Appl. No.:
10/835675
Inventors:
David W. Boggs - Hillsboro OR, US
John H. Dungan - Hillsboro OR, US
Frank A. Sanders - Beaverton OR, US
Daryl A. Sato - Portland OR, US
Dan Willis - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 21/44
H01L 21/48
H01L 21/50
US Classification:
438613, 438106, 438117, 438123, 438E2306, 257737
Abstract:
Formation of a plurality of conductive connectors of an integrated circuit package is described. The conductive connectors made with a conductive elastomer material and formed using an interposer that includes a plurality of the conductive connectors linked together.

Three-Dimensional Flexible Interposer

US Patent:
7325303, Feb 5, 2008
Filed:
Dec 8, 2006
Appl. No.:
11/635965
Inventors:
David W. Boggs - Hillsboro OR, US
John H. Dungan - Hillsboro OR, US
Frank A. Sanders - Beaverton OR, US
Daryl A. Sato - Portland OR, US
Dan Willis - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01R 43/16
US Classification:
29874, 29878, 29879, 29884, 439591
Abstract:
A generally planar interposer having a plurality of interposer contact pads to contact a plurality of first contacts of a first electronic device on one side of the interposer, and a plurality of electrical connections between the interposer contact pads and a plurality of pressure contacts on the other side of the interposer. Each of the pressure contacts having a directionally deformable contact surface to removably contact a plurality of second contacts of a second electronic device on the other side of the interposer. Also methods of forming the interposer.

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