John L Mcnitt, 553503 Muskrat Creek Dr, Fort Collins, CO 80528

6559704, May 6, 2003

Jun 19, 2001

09/884327

Sean A. Golliher - Windsor CO
Scott C. Savage - Fort Collins CO
John L. McNitt - Fort Collins CO

LSI Logic Corporation - Milpitas CA

H03K 190185

327333, 327256, 327112, 326 81

An apparatus comprising a control circuit and a logic circuit. The control circuit may be configured to receive an input signal and an indication signal and present a complement of the input signal. The logic circuit may be configured to receive the complementary input signal and generate an output signal. The output signal may provide full scale voltages between a first supply (e. g. , VSS) and a second supply (e. g. , VDD ).

6771110, Aug 3, 2004

Feb 25, 2003

10/374139

Sean A. Golliher - Windsor CO
Scott C. Savage - Fort Collins CO
John L. Mcnitt - Fort Collins CO

LSI Logic Corporation - Milpitas CA

H03K 190185

327333, 326 68, 326 81

An apparatus comprising a method for providing inverting level shifting, comprising the steps of (A) receiving an input signal having a first predetermined voltage level, (B) controlling a voltage level of said input signal and (C) generating an output signal having a second predetermined voltage level, wherein step (C) provides full scale output voltages between a first supply and a second supply.

6842058, Jan 11, 2005

Nov 12, 2002

10/292262

John L. McNitt - Fort Collins CO, US
Russell E. Radke - Fort Collins CO, US

LSI Logic Corporation - Milpitas CA

H03K 504

327170, 327130, 326 27

Systems and methods for enhancing slew control of output signals. An output driver receives an input signal and controllably increases the gain of that signal to provide a high quality output signal for use by an electronic device coupled thereto. The output driver includes an operational amplifier that maintains stability of the output signal through a feedback of the output signal. A control circuit supplies a signal to the output driver such that the driver to improve the shape of the output signal as the input signal is applied. After the operational amplifier regains control, the control circuit disengages. One embodiment of the present invention may be particularly useful as a USB output driver.

6870386, Mar 22, 2005

Oct 23, 2003

10/691938

Sean A. Golliher - Windsor CO, US
Scott C. Savage - Fort Collins CO, US
John L. McNitt - Fort Collins CO, US

LSI Logic Corporation - Milpitas CA

G01R031/26

324765, 324763, 3241581

A resistance measurement circuit includes a plurality of current sources, a plurality of resistor strings and a comparator. Each resistor string is coupled in series with a respective one of the current sources and includes a plurality of nodes with different resistances relative to a reference node. Each node in each resistor string has a different resistance relative to the reference node than corresponding nodes in the other resistor strings. The comparator has a first comparison input coupled to a reference voltage and a second comparison input selectively coupled to the plurality of nodes in each resistor string.

6897673, May 24, 2005

Mar 19, 2003

10/392206

Scott Christopher Savage - Fort Collins CO, US
John Lynn McNitt - Fort Collins CO, US
Sean Anthony Golliher - Windsor CO, US

LSI Logic Corporation - Milpitas CA

G01R031/02
G01R031/26

324765, 324763

On-chip absolute value measurement circuit and an on-chip capacitor mismatch value measurement circuits are provided. The absolute value measurement circuit begins charging a capacitor. When the voltage across the capacitor reaches a first threshold, the absolute value measurement circuit starts a counter. When the voltage across the capacitor reaches a second threshold, the counter stops. The counter value is provided as digital output. A computer device reads the digital output and calculates the absolute value of the capacitor based on the counter value. The mismatch measurement circuit repeatedly charges an evaluation capacitor and transfers the charge from the evaluation capacitor to an integrating capacitor. For each transfer of charge, a counter is incremented until the voltage across the integrating capacitor reaches a threshold voltage. The counter value is provided as digital output.

7081762, Jul 25, 2006

Jul 31, 2003

10/631610

John L. McNitt - Fort Collins CO, US
Scott C. Savage - Fort Collins CO, US

LSI Logic Corporation - Milpitas CA

G01R 27/28
G06F 9/45
H04J 1/12

324628, 370201, 716 5

A method and apparatus are provided for measuring high speed glitch energy between first and second. The method and apparatus induce a change in charge on the first node from a first charge level to a second charge level with glitch energy supplied by the second node. An amount of charge is then supplied to the first node to restore the charge on the first node from the second charge level toward the first charge level. A representation of the amount of charge supplied to the first node is measured.

2005002, Feb 3, 2005

Aug 1, 2003

10/632300

John McNitt - Fort Collins CO, US
Russell Radke - Fort Collins CO, US

G05F003/02

327536000

The highly efficient, high current drive, multi-phase voltage multiplier reduces the inefficiency due to the active level overlapping portion of the clock at high frequencies, reduces the inefficiency due to extremely large drive currents on the inverters supplying current to the multiplying capacitors C(*) and C(*), and increases the efficiency of the multiplier by allowing M-1 phases to charge the output at any given time and providing more time given to each capacitor to fully charge and discharge. The ripple on the output is much smaller than in a single dual phase multiplier. This multi-phase voltage multiplier supplies very large current to the load while remaining very efficient.

2013033, Dec 19, 2013

Jun 19, 2012

13/526768

Kerry Thompson - Fort Collins CO, US
John McNitt - Fort Collins CO, US
Mark Rutherford - Wellington CO, US

Broadcom Corporation - Irvine CA

H02J 7/00

320162

A power management unit accurately measures and controls charging current. The power management unit may be implemented more efficiently than prior designs, leading to cost savings in the implementation of the power management unit as well as in the implementation of the device that incorporates the power management unit. The power management unit incorporates a model of an external charge control device (e.g., a transistor) and uses that model in a way that allows the power management unit to eliminate external device pins and other circuitry.