Jorge M Munoz, 621653 W 24Th St, Los Angeles, CA 90007

6376910, Apr 23, 2002

Jun 23, 1999

09/361633

Jorge Munoz - Cypress CA
Chuan Cheah - El Segundo CA

International Rectifier Corporation - El Segundo CA

H01L 2348

257741, 257750, 257762, 257763, 257764

A solderable back contact for semiconductor die consists of a titanium layer bonded to the bottom of the die. The free surface of the titanium layer is coated with a copper layer. A soft solder layer joins the bottom of the die to a copper lead frame by first heating the die to below the melting point of the solder, and then ultrasonically âscrubbingâ the solder to cause it to bond to the die and lead frame with a minimum sized solder fillet.

6396127, May 28, 2002

Jan 3, 2000

09/476825

Jorge Munoz - Cypress CA
Rod DeLeon - Palmdale CA

International Rectifier Corporation - El Segundo CA

H01L 2350

257666, 257696, 257698, 257735, 257 72, 257724, 257728, 257401, 257139, 257329, 257334, 257341, 257691, 257675, 257796

A semiconductor package includes a bottom leadframe having a bottom plate portion and at least one first terminal extending from the bottom plate portion; at least one second terminal being co-planar with the first terminal; a semiconductor power MOSFET die having a bottom surface defining a drain connection and a top surface on which a first metalized region defining a source and a second metalized region defining a gate are disposed, the bottom surface being coupled to the bottom plate of the leadframe such that the first terminal is electrically connected to the drain; a copper plate coupled to and spanning a substantial part of the first metalized region defining the source connection, the copper plate including at least one chamfered edge extending upward and away from the first metalized region; and at least one beam portion being sized and shaped to couple the copper plate portion to the at least one second terminal such that it is electrically coupled to the source.

6410989, Jun 25, 2002

Jan 4, 1999

09/225254

Bharat Shivkumar - Los Angeles CA
Daniel M. Kinzer - El Segundo CA
Jorge Munoz - Cypress CA

International Rectifier Corporation - El Segundo CA

H01L 2348

257784, 257786, 257773, 257690, 257780, 257500

A substrate having upper and lower surfaces, the upper surface including a periphery defined by first and second spaced apart side edges and front and rear spaced apart edges; a power semiconductor die disposed on the upper surface of the substrate, the die including a top surface on which at least a first metalized surface is disposed and a bottom surface; a plurality of conductive pads disposed only at the second side edge of the substrate; and a plurality of wire bonds extending from the first metalized surface to the plurality of conductive pads.

6776399, Aug 17, 2004

May 20, 2002

10/153051

Bharat Shivkumar - Los Angeles CA
Daniel M. Kinzer - El Segundo CA
Jorge Munoz - Cypress CA

International Rectifier Corporation - El Segundo CA

H01L 2348

258786, 257784, 257780, 257773, 257691, 257692, 257698

A substrate having upper and lower surfaces, the upper surface including a periphery defined by first and second spaced apart side edges and front and rear spaced apart edges; a power semiconductor die disposed on the upper surface of the substrate, the die including a top surface on which at least a first metalized surface is disposed and a bottom surface; a plurality of conductive pads disposed only at the second side edge of the substrate; and a plurality of wire bonds extending from the first metalized surface to the plurality of conductive pads.

6984890, Jan 10, 2006

Jul 2, 2004

10/884521

Bharat Shivkumar - Redondo Beach CA, US
Daniel M. Kinzer - El Segundo CA, US
Jorge Munoz - Cypress CA, US

International Rectifier Corporation - El Segundo CA

H01L 23/34
H01L 23/48
H01L 23/52
H01L 29/40

257723, 257784, 257786, 257773, 257690

A substrate having upper and lower surfaces, the upper surface including a periphery defined by first and second spaced apart side edges and front and rear spaced apart edges; a power semiconductor die disposed on the upper surface of the substrate, the die including a top surface on which at least a first metalized surface is disposed and a bottom surface; a plurality of conductive pads disposed only at the second side edge of the substrate; and a plurality of wire bonds extending from the first metalized surface to the plurality of conductive pads.

2013004, Feb 28, 2013

Jul 25, 2012

13/557716

Jorge Munoz - Cypress CA, US

INTERNATIONAL RECTIFIER CORPORATION - EL SEGUNDO CA

H01L 23/495
H01L 29/78

257288, 257E29255, 257E23052

According to an exemplary embodiment, a small-outline package includes a power transistor having a source and a drain, the power transistor situated on a paddle of a leadframe of the small-outline package. The source of the power transistor is electrically connected to a plurality of source leads. The drain of the power transistor is electrically and thermally connected to a top side of the paddle of the leadframe, the paddle of the leadframe being exposed from a bottom surface of the small-outline package, thereby providing a direct electrical contact to the drain from a bottom side of the paddle of the leadframe.

6040626, Mar 21, 2000

Jan 4, 1999

9/225153

Chuan Cheah - El Segundo CA
Jorge Munoz - Cypress CA
Dan Kinzer - El Segundo CA

International Rectifier Corp. - El Segundo CA

H01L 2348
H01L 2352
H01L 2940

257735

A semiconductor package includes a bottom leadframe having a bottom plate portion and at least one first terminal extending from the bottom plate portion; at least one second terminal being co-planar with the first terminal; a semiconductor power MOSFET die having a bottom surface defining a drain connection and a top surface on which a first metalized region defining a source and a second metalized region defining a gate are disposed, the bottom surface being coupled to the bottom plate of the leadframe such that the first terminal is electrically connected to the drain; a copper plate coupled to and spanning a substantial part of the first metalized region defining the source connection; and at least one beam portion being sized and shaped to couple the copper plate portion to the at least one second terminal such that it is electrically coupled to the source.