BackgroundCheck.run
Search For

Joseph J Fine, 421664 Wolff St, Denver, CO 80204

Joseph Fine Phones & Addresses

1664 Wolff St, Denver, CO 80204    303-8930980   

11 Sherri Ln, Spring Valley, NY 10977    845-5381001   

Monsey, NY   

Work

Company: Labor ready inc Address: 9291 Washington St, Westminster, CO 80229 Phones: 303-4579675 Position: Manager Industries: Employment Agencies

Mentions for Joseph J Fine

Career records & work history

Lawyers & Attorneys

Joseph Fine Photo 1

Joseph S. Fine, Montclair NJ - Lawyer

Address:
Joseph S. Fine, Esq., Arbitrator and Mediator
31 Trinity Pl Ste 1, Montclair, NJ 07042
973-7460901 (Office)
Licenses:
New York - Currently registered 1983
Education:
Rutgers University School of Law
Joseph Fine Photo 2

Joseph S Fine, Newark NJ - Lawyer

Address:
Law Offices of Reitman Parsonnet, P.C.
744 Broad Street Suite 1807, Newark, NJ 07102
973-6420885 (Office), 973-6420946 (Fax)
Montclair, NJ
973-7460901 (Office)
Licenses:
New Jersey - Active 1982
Education:
Rutgers, The State University of New Jersey School of Law - Newark (S.I. Newhouse Center for Law & Justice)Degree JD - Juris Doctor - LawGraduated 1982
Rutgers UniversityDegree BA - Bachelor of Arts - Labor StudiesGraduated 1979
Associations:
National Lawyers Guild, New York City Labor Project - Member, 1981-present
AFL-CIO Lawyers Coordinating Committee - Member
American Bar Association, Labor and Employment Law Section, Development of the Law Under the NLRA Committee - Member
New Jersey State Bar Association, Labor and Employment Law Section, Practices and Procedures of the NLRB Committee - Member
Joseph Fine Photo 3

Joseph Fine - Lawyer

Specialties:
Civil Litigation
ISLN:
918213301
Admitted:
1998
University:
University of Delaware, B.A., 1994
Law School:
Widener University, J.D., 1998
Joseph Fine Photo 4

Joseph S. Fine - Lawyer

Admitted:
1982, New Jersey and U.S. District Court, District of New Jersey 1983, New York
University:
Rutgers University, B.A., Rutgers University, J.D.
Biography:
Not available
Joseph Fine Photo 5

Joseph Fine - Lawyer

Medicine Doctors

Joseph Fine Photo 6

Joseph Gillespie Fine

Specialties:
Anesthesiology
Family Medicine
Education:
Universidad Nacional De La Plata (1958) Surgery

Resumes & CV records

Resumes

Joseph Fine Photo 38

Joseph S. Fine, Esq.., Mediator And Arbitrator

Location:
Greater New York City Area
Industry:
Alternative Dispute Resolution
Joseph Fine Photo 39

Account Executive At Hudson Energy Services

Location:
Greater New York City Area
Industry:
Oil & Energy
Joseph Fine Photo 40

Independent Construction Professional

Location:
Greater Denver Area
Industry:
Construction
Joseph Fine Photo 41

Millwork Engineering Specialist

Location:
Greater New York City Area
Industry:
Architecture & Planning
Joseph Fine Photo 42

Joseph Fine

Location:
United States
Joseph Fine Photo 43

Coordinator At National Doctors Alliance Seiu

Location:
Greater New York City Area
Industry:
Nonprofit Organization Management

Publications & IP owners

Us Patents

Synchronization And Tracking In A Digital Communication System

US Patent:
6389088, May 14, 2002
Filed:
Feb 22, 2000
Appl. No.:
09/510496
Inventors:
Gary Vincent Blois - Towaco NJ
Joseph Michael Fine - West Caldwell NJ
Marvin A. Epstein - Monsey NY
Assignee:
ITT Manufacturing Enterprises, Inc. - Wilmington DE
International Classification:
H04L 700
US Classification:
375355, 375226, 375343, 375368
Abstract:
There is disclosed a bit sync search and frame sync search system operative with a digital data signal as transmitted by a digital radio transmitter. The bit search is implemented by detecting a predetermined phasing signal which is incorporated in the digital signal and which has a repetitive bit pattern of ones and zeroes. The phasing signal is first detected by providing an in-phase and quadrature component signal and correlating those signals to provide an output signal indicative of the bit pattern in the phasing signal. After the phasing signal has been provided and an oscillator associated with a receiving apparatus is compensated according to the detected phasing signal, a tracking mode is entered, whereby a frame signal is captured and the system generates histograms of data bit transitions for producing an error signal indicative of the difference of the transmitted clock rate and the sampling portion of a received bit. In this manner, by adjusting the clock according to the error signal produced by the histogram process one can be assured that the sampling rate at the receiver will occur relatively at the center of each bit to therefore provide reliable decoding or detection of the received digital data signal in the presence of the noise.

Radio Remote Interface For Modulating/Demodulating Data In A Digital Communication System

US Patent:
6137828, Oct 24, 2000
Filed:
Aug 16, 1999
Appl. No.:
9/375064
Inventors:
Marvin A. Epstein - Monsey NY
Gary V. Blois - Towaco NJ
Joseph M. Fine - West Caldwell NJ
Assignee:
ITT Manufacturing Enterprises, Inc. - Wilmington DE
International Classification:
H04L 516
US Classification:
375219
Abstract:
There is disclosed in a digital communications system for communicating between two radios by transceiving a signal comprising a first type control signal, a second type data traffic signal and a third type voice signal, a remote communication interface for providing transmission therebetween comprising a duplexer/bridge network for transceiving the signal, means for determining the signal type to be transmitted, low pass filters and analog to digital and digital to analog converters for processing received and transmitted signals, and a digital signal processor for modulating and demodulating the signal for transmission/reception according to the signal type. There is also disclosed means for adjusting the clock sampling frequency during the demodulation process to obtain bit sync, bit tracking and frequency tracking. The communication interface is operable to transceive either the modulated traffic, control, or voice signal, or combined modulated traffic and control signal, or combined modulated voice and control signal.

Radio Remote Interface For Modulating/Demodulating Data In A Digital Communication System

US Patent:
5970086, Oct 19, 1999
Filed:
May 22, 1997
Appl. No.:
8/861606
Inventors:
Marvin A. Epstein - Monsey NY
Gary V. Blois - Towaco NJ
Joseph M. Fine - West Caldwell NJ
Assignee:
ITT Manufacturing Enterprises - Wilmington DE
International Classification:
H04B 138
H04J 304
H04L 12403
H04Q 720
US Classification:
375219
Abstract:
In a digital communications system for communicating between two radios by transceiving a signal comprising a first type control signal, a second type data traffic signal, and a third type voice signal, a remote communication interface for providing transmission therebetweeen comprising a duplexer bridge network for transceiving the signal, low pass filters, and analog to digital and digital to analog converters for processing received and transmitted signals respectively, and a digital signal processor for modulating and demodulating the signal for transmission or reception according to the signal type. A control signal output from the digital signal processor enables adjustment of the clock sampling frequency during the reception and demodulation process to obtain bit sync, bit tracking and frequency tracking. The communication interface is operable to transceive either the modulated traffic, control, or voice signal, or combined modulated traffic and control signal, or combined modulated voice and control signal.

Synchronization And Tracking In A Digital Communication System

US Patent:
6052423, Apr 18, 2000
Filed:
Jul 8, 1999
Appl. No.:
9/349077
Inventors:
Gary Vincent Blois - Towaco NJ
Joseph Michael Fine - West Caldwell NJ
Marvin A. Epstein - Monsey NY
Assignee:
ITT Manufacturing Enterprises, Inc. - Wilmington DE
International Classification:
H04L 700
US Classification:
375355
Abstract:
There is disclosed a bit sync search and frame sync search system operative with a digital data signal as transmitted by a digital radio transmitter. The bit search is implemented by detecting a predetermined phasing signal which is incorporated in the digital signal and which has a repetitive bit pattern of ones and zeroes. The phasing signal is first detected by providing an in-phase and quadrature component signal and correlating those signals to provide an output signal indicative of the bit pattern in the phasing signal. After the phasing signal has been provided and an oscillator associated with a receiving apparatus is compensated according to the detected phasing signal, a tracking mode is entered, whereby a frame signal is captured and the system generates histograms of data bit transitions for producing an error signal indicative of the difference of the transmitted clock rate and the sampling portion of a received bit. In this manner, by adjusting the clock according to the error signal produced by the histogram process one can be assured that the sampling rate at the receiver will occur relatively at the center of each bit to therefore provide reliable decoding or detection of the received digital data signal in the presence of the noise.

Synchronization And Tracking In A Digital Communication System

US Patent:
6002728, Dec 14, 1999
Filed:
Apr 17, 1997
Appl. No.:
8/837353
Inventors:
Gary Vincent Blois - Towaco NJ
Joseph Michael Fine - West Caldwell NJ
Marvin A. Epstein - Monsey NY
Assignee:
ITT Manufacturing Enterprises Inc. - Wilmington DE
International Classification:
H04L 700
US Classification:
375355
Abstract:
There is disclosed a bit sync search and frame sync search system operative with a digital data signal as transmitted by a digital radio transmitter. The bit search is implemented by detecting a predetermined phasing signal which is incorporated in the digital signal and which has a repetitive bit pattern of ones and zeroes. The phasing signal is first detected by providing 94 in-phase and quadrature component signals and correlating those signals to provide an output signal indicative of the bit pattern in the phasing signal. After the phasing signal has been provided and an oscillator associated with a receiving apparatus is compensated according to the detected phasing signal, a tracking mode is entered, whereby a frame signal is captured and the system generates histograms of data bit transitions for producing an error signal indicative of the difference of the transmitted clock rate and the sampling portion of a received bit. In this manner, by adjusting the clock according to the error signal produced by the histogram process one can be assured that the sampling rate at the receiver will occur relatively at the center of each bit to therefore provide reliable decoding or detection of the received digital data signal in the presence of the noise.

Frequency Hopping Synchronization And Tracking In A Digital Communication System

US Patent:
6052406, Apr 18, 2000
Filed:
May 2, 1997
Appl. No.:
8/850231
Inventors:
Marvin A. Epstein - Monsey NY
Gary V. Blois - Towaco NJ
Joseph M. Fine - West Caldwell NJ
Assignee:
ITT Manufacturing Enterprises, Inc. - Wilmington DE
International Classification:
H04K 100
H04K 104
H04L 2730
H04L 700
US Classification:
375202
Abstract:
There is disclosed an improved frequency hopping synchronization and tracking system for bit syncing and frame syncing a digital data signal as transmitted by a radio transmitter. A detection means responsive to incoming data samples representative of the phasing signal portion of the digital data signal partitions the data samples into alternating first and second sample sequences and correlates the samples against a frequency hop modulation code reference sequence to provide an initial data signal detection. A post-detection means responsive to the initial detection and to the frequency hop modulation code reference sequence correlates the incoming data samples and compares the spectral power of the correlated data samples to a threshold value to provide bit sync of the detected data signal. Tracking means responsive to the bit sync and to the input samples captures a frame signal and generates histograms of data bit transitions for producing an error signal indicative of the difference of the transmitted clock rate and the sampling position of the received bit. A clock means responsive to the error signal produced by the histogram process can be adjusted according to the error signal to enable sampling of each received data bit to occur relatively at the center of each bit to ensure reliable decoding or detection of a digital data signal in a noisy channel at the receiver.

Method For Removing Bias In A Frequency Hopping Digital Communication System

US Patent:
5881096, Mar 9, 1999
Filed:
Jun 5, 1997
Appl. No.:
8/869583
Inventors:
Bryan S. Majkrzak - Clifton NJ
John Bertrand - Upper Nyack NY
Marvin A. Epstein - Monsey NY
Gary V. Blois - Towaco NJ
Joseph M. Fine - West Caldwell NJ
Assignee:
ITT Manufacturing Enterprises, Inc. - Wilmington DE
International Classification:
H04B 1500
H04K 100
H04L 2730
US Classification:
375202
Abstract:
There is disclosed in a frequency hopping digital communications system having a transmitter for transmitting a data signal via a noisy transmission path, and a receiver responsive to the transmitted signal for receiving the same, a method for removing bias in the data signal at the receiver comprising the steps of: forming a sample amplitude histogram from the received data signal samples for a given hop frequency; correlating the amplitude histogram against a stored reference amplitude histogram to obtain a correlated output signal having a peak correlation position; determining the position difference between the peak correlation position and the correlation center position to provide an offset signal corresponding to the difference and indicative of an estimated bias offset value; and applying the estimated bias offset value to the received signal samples in response to the offset signal to obtain an output signal indicative of an unbiased received data signal.

Noisy Channel Avoidance Method In A Digital Communication System

US Patent:
6018543, Jan 25, 2000
Filed:
May 21, 1997
Appl. No.:
8/861604
Inventors:
Gary V. Blois - Towaco NJ
Joseph M. Fine - West Caldwell NJ
Marvin A. Epstein - Monsey NY
Assignee:
ITT Manufacturing Enterprises, Inc. - Wilmington DE
International Classification:
H04B 1500
H04B 126
US Classification:
375202
Abstract:
There is disclosed in a frequency hopping digital communication network having a multimode radio transmitter for transmitting a data signal and a multimode radio receiver tuned for receiving the same, the multimode transmitter and receiver operable in a first standard mode and a second enhanced mode, each mode having a late-net acquisition library period and an in-net acquisition library period, a method for obtaining a non-noisy frequency channel over which to receive the data signal transmitted across the radio network. The method comprises the steps of successively averaging signal samples received over a particular frequency channel and time interval corresponding to the receiver mode and library period to determine the noise level of the particular reception frequency channel. The averaged signal samples are then compared to a predetermined noise threshold to determine whether the frequency channel is noisy. If the frequency channel is determined to be noisy, the receiver is tuned to a new reception frequency channel, the new frequency channel being selectable from a group of permissible frequency channels and responsive to the receiver mode and library period and in a predetermined sequence.

NOTICE: You may not use BackgroundCheck or the information it provides to make decisions about employment, credit, housing or any other purpose that would require Fair Credit Reporting Act (FCRA) compliance. BackgroundCheck is not a Consumer Reporting Agency (CRA) as defined by the FCRA and does not provide consumer reports.