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Justin P Weber, 481520 NE 64Th Ave, Portland, OR 97213

Justin Weber Phones & Addresses

1520 NE 64Th Ave, Portland, OR 97213   

Beaverton, OR   

Kihei, HI   

Newberg, OR   

Mentions for Justin P Weber

Career records & work history

Lawyers & Attorneys

Justin Weber Photo 1

Justin Weber - Lawyer

Specialties:
International Law
ISLN:
1000401946
Admitted:
2019
Law School:
Wayne State University Law School, 2018

License Records

Justin Weber

Licenses:
License #: 37618 - Expired
Category: Tow Truck Operator (Incident Management)
Expiration Date: Jan 28, 2017

Justin Scott Weber Dds

Licenses:
License #: 7035 - Active
Category: Dentistry
Issued Date: Jun 15, 2012
Effective Date: Jun 15, 2012
Expiration Date: Mar 1, 2019
Type: Dentist

Justin Weber resumes & CV records

Resumes

Justin Weber Photo 49

Computational Materials Science

Location:
Portland, OR
Industry:
Semiconductors
Work:
Intel Corporation
Computational Materials Science
Uc Santa Barbara Dec 2005 - Nov 2010
Graduate Student Researcher
The Ohio State University Jun 2000 - Aug 2005
Student Researcher
Education:
Uc Santa Barbara 2005 - 2010
Doctorates, Doctor of Philosophy, Physics, Philosophy
The Ohio State University 2004 - 2005
Master of Science, Masters, Computer Engineering
The Ohio State University 1999 - 2004
Bachelors, Bachelor of Science, Computer Engineering, Physics
Skills:
Semiconductors, Materials Science, Computational Materials Science, Computational Physics, Modeling, Condensed Matter Physics, Solid State Physics
Justin Weber Photo 50

Manager Cardiac Short Stay Unit

Location:
Portland, OR
Industry:
Hospital & Health Care
Work:
St. Charles Medical Center
Manager Cardiac Short Stay Unit
Providence Health & Services
Manager Clinical Operations
Shriners Hospitals For Children Feb 2011 - Mar 2014
Registered Nurse Ii and Charge Nurse
Providence Health & Services Mar 2014 - Mar 2014
Associate Nurse Manager
Slocum Orthopedics Asc Oct 2010 - Jan 2011
Registered Nurse
Ohsu | Oregon Health & Science University Jan 2007 - Jan 2010
Orthopedic Surgery Coordinator
Education:
University of Phoenix 2017 - 2017
Bachelors, Bachelor of Science
University of Phoenix 2010 - 2012
Bachelors, Bachelor of Science, Business Administration, Management
Vermont Technical College 2002 - 2004
Associates, Nursing
University of Phoenix
Master of Business Administration, Masters, Business Administration, Management, Business Administration and Management
University of Phoenix
Master of Science, Masters, Nursing Administration
Skills:
Hospitals, Surgery, Orthopedics, Nursing, Patient Safety, Pediatrics, Patient Advocacy, Emr, Nursing Education, Bls, Acute Care, Medication Administration, Orthopedic, Quality Improvement, Critical Care, Pals, Iv, Patient Education, Epic Systems, Wound Care, Ambulatory
Interests:
Poverty Alleviation
Economic Empowerment
Justin Weber Photo 51

Avionics Technician

Location:
Portland, OR
Industry:
Aviation & Aerospace
Work:
Duncan Aviation
Avionics Technician
Dallas Airmotive
Regional Field Service Representitive
Premier Jets, Inc. Apr 2007 - Jul 2014
Aviation Mechanic
Justin Weber Photo 52

Regional Field Service Representative

Location:
Portland, OR
Industry:
Aviation & Aerospace
Work:
Dallas Airmotive
Regional Field Service Representative
Justin Weber Photo 53

Justin Weber

Justin Weber Photo 54

Justin Weber

Justin Weber Photo 55

Justin Weber

Justin Weber Photo 56

Justin Weber

Publications & IP owners

Us Patents

Vertically Stacked Finfets & Shared Gate Patterning

US Patent:
2022033, Oct 20, 2022
Filed:
Jun 23, 2022
Appl. No.:
17/848191
Inventors:
- Santa Clara CA, US
Sean Ma - Portland OR, US
Justin R. Weber - Hillsboro OR, US
Rishabh Mehandru - Portland OR, US
Stephen M. Cea - Hillsboro OR, US
Patrick Morrow - Portland OR, US
Patrick H. Keys - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 21/822
H01L 21/306
H01L 21/311
H01L 21/8238
H01L 21/8258
H01L 27/092
H01L 29/417
H01L 29/66
Abstract:
Stacked finFET structures including a fin having at least a first layer of semiconductor material stacked over or under a second layer of semiconductor material. The first and second layers may include a Group IV semiconductor material layer and a Group III-V semiconductor material layer, for example. A stacked finFET may include an N-type finFET stacked over or under a P-type finFET, the two finFETs may have channel portions within the different semiconductor material layers. Channel portions of the first and second layers of semiconductor material may be coupled to separate gate electrodes that are vertically aligned. Channel portions of the first and second layers of semiconductor material may be vertically separated by subfin portions of the first and second layers. Different layers of dielectric material adjacent to the subfin portions may improve electrical isolation between the channel portions, for example as a source of fixed charge or impurity dopants.

Compositional Engineering Of Schottky Diode

US Patent:
2022019, Jun 23, 2022
Filed:
Dec 23, 2020
Appl. No.:
17/133599
Inventors:
- Santa Clara CA, US
Urusa ALAAN - Hillsboro OR, US
Justin WEBER - Portland OR, US
Charles C. KUO - Union City CA, US
Yu-Jin CHEN - Hillsboro OR, US
Kaan OGUZ - Beaverton OR, US
Matthew V. METZ - Portland OR, US
Abhishek A. SHARMA - Hillsboro OR, US
Prashant MAJHI - San Jose CA, US
Brian S. DOYLE - Portland OR, US
Van H. LE - Portland OR, US
International Classification:
H01L 29/872
H01L 27/07
H01L 29/47
H01L 29/22
Abstract:
Embodiments disclosed herein include semiconductor devices with Schottky diodes in a back end of line stack. In an embodiment, a semiconductor device comprises a semiconductor layer, where transistor devices are provided in the semiconductor layer, and a back end stack over the semiconductor layer. In an embodiment, a diode is in the back end stack. In an embodiment, the diode comprises a first electrode, a semiconductor region over the first electrode, and a second electrode over the semiconductor region. In an embodiment, a first interface between the first electrode and the semiconductor region is an ohmic contact, and a second interface between the semiconductor region and the second electrode is a Schottky contact.

Graphitic Carbon Contacts For Devices With Oxide Channels

US Patent:
2023010, Mar 30, 2023
Filed:
Sep 17, 2021
Appl. No.:
17/478720
Inventors:
- Santa Clara CA, US
Matthew V. Metz - Portland OR, US
Hui Jae Yoo - Hillsboro OR, US
Justin R. Weber - Portland OR, US
Van H. Le - Beaverton OR, US
Jason C. Retasket - Beaverton OR, US
Abhishek A. Sharma - Hillsboro OR, US
Noriyuki Sato - Hillsboro OR, US
Yu-Jin Chen - Hillsboro OR, US
Eric Mattson - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 29/45
H01L 29/786
H01L 29/78
H01L 29/66
H01L 27/108
H01L 29/417
Abstract:
Described herein are integrated circuit devices with metal-oxide semiconductor channels and carbon source and drain (S/D) contacts. S/D contacts conduct current to and from the semiconductor devices, e.g., to the source and drain regions of a transistor. Carbon S/D contacts may be particularly useful with semiconductor devices that use certain channel materials, such as indium gallium zinc oxide.

Multi-Layer Crystalline Back Gated Thin Film Transistor

US Patent:
2021040, Dec 30, 2021
Filed:
Sep 13, 2021
Appl. No.:
17/472879
Inventors:
- Santa Clara CA, US
Abhishek A. Sharma - Hillsboro OR, US
Gilbert Dewey - Hillsboro OR, US
Kent Millard - Hillsboro OR, US
Jack Kavalieros - Portland OR, US
Shriram Shivaraman - Hillsboro OR, US
Tristan A. Tronic - Aloha OR, US
Sanaz Gardner - Portland OR, US
Justin R. Weber - Hillsboro OR, US
Tahir Ghani - Portland OR, US
Li Huey Tan - Hillsboro OR, US
Kevin Lin - Beaverton OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 29/786
H01L 27/12
H01L 29/66
Abstract:
Described is an apparatus which comprises: a gate comprising a metal; a first layer adjacent to the gate, the first layer comprising a dielectric material; a second layer adjacent to the first layer, the second layer comprising a second material; a third layer adjacent to the second layer, the third layer comprising a third material including an amorphous metal oxide; a fourth layer adjacent to the third layer, the fourth layer comprising a fourth material, wherein the fourth and second materials are different than the third material; a source partially adjacent to the fourth layer; and a drain partially adjacent to the fourth layer.

Vertically Stacked Transistors In A Fin

US Patent:
2021035, Nov 11, 2021
Filed:
Jul 26, 2021
Appl. No.:
17/385688
Inventors:
- Santa Clara CA, US
Sean T. Ma - Portland OR, US
Justin R. Weber - Hillsboro OR, US
Patrick Morrow - Portland OR, US
Rishabh Mehandru - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 21/822
H01L 21/02
H01L 21/225
H01L 21/265
H01L 21/683
H01L 21/762
H01L 21/8234
H01L 27/088
H01L 29/167
H01L 29/40
H01L 29/66
Abstract:
An apparatus is provided which comprises: a fin; a layer formed on the fin, the layer dividing the fin in a first section and a second section; a first device formed on the first section of the fin; and a second device formed on the second section of the fin.

Transistor Channel Passivation With 2D Crystalline Material

US Patent:
2021008, Mar 18, 2021
Filed:
Sep 13, 2019
Appl. No.:
16/570965
Inventors:
- Santa Clara CA, US
Abhishek Sharma - Hillsboro OR, US
Mauro Kobrinsky - Portland OR, US
Christopher Jezewski - Portland OR, US
Urusa Alaan - Hillsboro OR, US
Justin Weber - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 29/786
H01L 27/12
H01L 29/66
Abstract:
Transistor structures with a channel semiconductor material that is passivated with two-dimensional (2D) crystalline material. The 2D material may comprise a semiconductor having a bandgap offset from a band of the channel semiconductor. The 2D material may be a thin as a few monolayers and have good temperature stability. The 2D material may be a conversion product of a sacrificial precursor material, or of a portion of the channel semiconductor material. The 2D material may comprise one or more metal and a chalcogen. The channel material may be a metal oxide semiconductor suitable for low temperature processing (e.g., IGZO), and the 2D material may also be compatible with low temperature processing (e.g.,

Transistor Structures With A Metal Oxide Contact Buffer

US Patent:
2020041, Dec 31, 2020
Filed:
Jun 27, 2019
Appl. No.:
16/455581
Inventors:
- Santa Clara CA, US
Abhishek Sharma - Hillsboro OR, US
Van Le - Beaverton OR, US
Jack Kavalieros - Portland OR, US
Shriram Shivaraman - Hillsboro OR, US
Seung Hoon Sung - Portland OR, US
Tahir Ghani - Portland OR, US
Arnab Sen Gupta - Beaverton OR, US
Justin Weber - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 29/786
H01L 29/221
H01L 27/092
H01L 21/8238
Abstract:
Transistor structures may include a metal oxide contact buffer between a portion of a channel material and source or drain contact metallization. The contact buffer may improve control of transistor channel length by limiting reaction between contact metallization and the channel material. The channel material may be of a first composition and the contact buffer may be of a second composition.

Multi-Layer Crystalline Back Gated Thin Film Transistor

US Patent:
2020035, Nov 12, 2020
Filed:
Sep 29, 2017
Appl. No.:
16/640340
Inventors:
- Santa Clara CA, US
Abhishek A. Sharma - Hillsboro OR, US
Gilbert Dewey - Hillsboro OR, US
Kent Millard - Hillsboro OR, US
Jack Kavalieros - Portland OR, US
Shriram Shivaraman - Hillsboro OR, US
Tristan A. Tronic - Aloha OR, US
Sanaz Gardner - Portland OR, US
Justin R. Weber - Hillsboro OR, US
Tahir Ghani - Portland OR, US
Li Huey Tan - Hillsboro OR, US
Kevin Lin - Beaverton OR, US
Assignee:
INTEL CORPORATION - Santa Clara CA
International Classification:
H01L 29/786
H01L 27/12
H01L 29/66
Abstract:
Described is an apparatus which comprises: a gate comprising a metal; a first layer adjacent to the gate, the first layer comprising a dielectric material; a second layer adjacent to the first layer, the second layer comprising a second material; a third layer adjacent to the second layer, the third layer comprising a third material including an amorphous metal oxide; a fourth layer adjacent to the third layer, the fourth layer comprising a fourth material, wherein the fourth and second materials are different than the third material; a source partially adjacent to the fourth layer; and a drain partially adjacent to the fourth layer.

Amazon

Justin Weber Photo 60

The Big Bow Mystery

Author:
Israel Zangwill
Publisher:
Dybbuk Press
Binding:
Kindle Edition
From Publishers WeeklyWhodunit fans who prefer their murders mysteriously committed behind locked doors will appreciate this reissue of the first impossible crime novel, penned by the unlikely Zangwill (1864-1926)-better known during his lifetime as an ardent British Zionist-in the late 1890s. Widow...
Justin Weber Photo 61

The Crimson Pact: Volume 2

Author:
Paul Genesse, Suzzanne Myers, Chanté McCoy, Patrick Tomlinson, Richard Lee Byers, EA Younker, Sarah Hans, Elaine Blose, Sarah Kanning, Gloria Weber, Justin Swapp, Isaac Bell, Lester Smith, K.E. McGee, Donald J. Bingle, Patrick M. Tracy, T.S. Rhodes, Elizabeth Shack, Kelly Swails, Nayad Monroe, Larry Correia
Publisher:
Alliteration Ink
Binding:
Paperback
Pages:
584
ISBN #:
0984006508
EAN Code:
9780984006502
The Pact is back and demons are as devious as ever in The Crimson Pact Volume 2. Read 28 original stories (over 500 pages in print!), including many sequels to stories in volume one. Suzzanne Myers's powerful flash fiction piece, "Withered Tree" continues with the exceptional short story, "Seven Dog...
Justin Weber Photo 62

The Big Bow Mystery

Author:
Israel Zangwill
Publisher:
Dybbuk Press, LLC
Binding:
Paperback
Pages:
196
ISBN #:
0976654636
EAN Code:
9780976654636
On a foggy day in the Big Bow District of London, Mrs. Drabdump becomes fearful for her lodger. She knocks several times at his door but no answer. She runs to Inspector Grodman and together they break down his door to find the pooor man lying in his bed with his throat cut. The door was locked from...
Justin Weber Photo 63

Approaching Zero: As Long As We Burn Fossil Fuels, We Will Have Carbon Emissions To Contend With. What Are The Most Promising Ways To Keep Them At A ... An Article From: Mechanical Engineering-Cime

Author:
Tim Lieuwen, George Richards, Justin Weber
Publisher:
American Society of Mechanical Engineers
Binding:
Digital
Pages:
11
This digital document is an article from Mechanical Engineering-CIME, published by American Society of Mechanical Engineers on May 1, 2010. The length of the article is 3136 words. The page length shown above is based on a typical 300-word page. The article is delivered in HTML format and is availab...

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