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Kanwar H Singh, 47Jersey City, NJ

Known as:
Singh Kanwar Kanwar Sind Kanwar S Ingh Kanwar Sindh Kanwar G
Related to:
Shawn Raju Singh 50

Kanwar Singh Phones & Addresses

Jersey City, NJ   

13108 Winterberry Way, Princeton, NJ 08540   

Champaign, IL   

Urbana, IL   

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Mentions for Kanwar H Singh

Career records & work history

Medicine Doctors

Kanwar A. Singh

Specialties:
Ophthalmology
Work:
Eye Center Of Racine & Kenosha
3805B Spg St STE 140, Racine, WI 53405
262-6370500 (phone) 262-6377650 (fax)
Eye Center Of Racine & Kenosha
9916 75 St STE 101, Kenosha, WI 53142
262-6581937 (phone) 262-6582638 (fax)
Procedures:
Corneal Surgery, Eye Muscle Surgery, Eyeglass Fitting, Lens and Cataract Procedures, Ophthalmological Exam
Conditions:
Acute Conjunctivitis, Cataract, Diabetic Retinopathy, Glaucoma, Heart Failure, Keratitis, Macular Degeneration, Orbital Infection, Retinal Detachments
Languages:
English, Spanish
Description:
Dr. Singh works in Racine, WI and 1 other location and specializes in Ophthalmology. Dr. Singh is affiliated with St Catherines Medical Center and Wheaton Franciscan Healthcare All Saints.
Kanwar Singh Photo 1

Kanwar Singh

Kanwar Singh Photo 2

Kanwar Yugraj Singh

Specialties:
Internal Medicine

Publications & IP owners

Us Patents

Method And Memory Cache For Cache Locking On Bank-By-Bank Basis

US Patent:
6438655, Aug 20, 2002
Filed:
Nov 10, 1999
Appl. No.:
09/437271
Inventors:
Christopher John Nicol - Springwood N.S.W., AU
Kanwar Jit Singh - Hazlet NJ
Assignee:
Lucent Technologies Inc. - Murray Hill NJ
International Classification:
G06F 1200
US Classification:
711136, 711160, 36523003
Abstract:
A cache implements bank-by-bank locking to keep critical code from being flushed out of the cache. A register is maintained to rank the banks from the most recently used to the least recently used. Ordinarily, when code needs to be moved into the cache, the least recently used bank is flushed, the code is moved into that bank, and the register is updated to identify that bank as the most recently used. However, if a bank is designated in a bypass vector as being locked, that bank is bypassed in the maintenance of the register and is thus never identified as the bank to be flushed.

Method Of And Apparatus For Efficiently Debugging Programs Given Limited System Resources

US Patent:
5794045, Aug 11, 1998
Filed:
Dec 18, 1996
Appl. No.:
8/769290
Inventors:
William Martin Schell - Watchung NJ
Kanwar Jit Singh - Matawan NJ
Guy Ashley Story - New York NY
Pasupathi Ananta Subrahmanyam - Freehold NJ
Assignee:
Lucent Technologies Inc. - Murray Hill NJ
International Classification:
G06F 945
US Classification:
395704
Abstract:
A device for creating and analyzing larger symbolic representations without the limitations imposed by available resources of previous devices is disclosed. More specifically, a debugger for debugging a symbolic representation of a program is disclosed. The debugger comprising means for inputting a set of characteristics, means for linking the set of characteristics to the symbolic representation, means for identifying a first portion of the symbolic representation mutually exclusive from the set of characteristics, and means for analyzing a second portion of the symbolic representation for the set of characteristics wherein the second portion being mutually exclusive from the first portion. A method of debugging programs using the debugger, in addition to the resultant debugged program, is also disclosed.

Method To Derive The Functionality Of A Digital Circuit From Its Mask Layout

US Patent:
5677848, Oct 14, 1997
Filed:
Nov 3, 1995
Appl. No.:
8/552421
Inventors:
Kanwar J. Singh - Matawan NJ
Pasupathi A. Subrahmanyam - Freehold NJ
Assignee:
Lucent Technologies Inc. - Murray Hill NJ
International Classification:
G06F 1750
US Classification:
364489
Abstract:
A method for generating a simplified model of a complex binary transistor circuit. A set of Boolean functions are derived for the circuit and these functions are tested to determine if the circuit is stable and binary. All intermediate transient circuit configurations are eliminated so that only direct transitions between stable circuit configurations remain. If the circuit is also combinational, a logic circuit is generated. If the circuit is not combinational but if there is a clock input to the circuit that controls the values of the node (the circuit exhibits synchronous behavior) and all nodes in the circuit are well-defined (either combinational or level-sensitive), a logic circuit is generated. The logic circuit is processed to generate a further simplified logic circuit by merging different types of latches and other logic elements and removing duplicative logic elements.

Isbn (Books And Publications)

Sawai Man Singh Ii Of Jaipur: Life And Legend

Author:
Kanwar Rajpal Singh
ISBN #:
8174364005

The Nagas Of Nagaland: Desperadoes And Heroes Of Peace

Author:
Kanwar Randip Singh
ISBN #:
8171000207

Possible Relatives

David J Singh  Davinder Singh  Davinderpal Singh  Dawinder Singh  Dale D Singh  Daler Singh  Dalip D Singh  Kanwar N Khan  Kanwar K Sandhu  Kanwar J Sidhu 

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