Keith H Lofstrom, 715290 Elm Ave, Beaverton, OR 97005

6738788, May 18, 2004

Apr 17, 2002

10/124860

Keith Lofstrom - Beaverton OR

ICID, LLC - Palo Alto CA

G06F 1730

7071041, 707101

A database system accesses database records referenced by a binary number key having two fields, a typeID field containing only deterministic bits, and a uniqueID field permissibly containing one or more non-deterministic bits at any bit positions therein. The database system maintains a set of databases, each being identified by a separate value of the typeID field of the binary number key. The records of each database are allocated among a plurality of bins, with each bin being identified (keyed) by separate value of a binID field, and with each record being identified (keyed) by a separate value of a recID field. The database system locates a record of interest referenced by the binary number key by first selecting a particular one of the databases that is identified by the typeID field of the binary number key. It then compares a portion of selected bits of the binary number keys uniqueID field to binID values identifying bins of the selected database to determine a subset of the bins that may include the record of interest. The database system then compares the full uniqueID field of the binary number key to the recIDs values for records of the subset of bins to determine which particular recID field identifies the record of interest.

RE40188, Mar 25, 2008

Dec 12, 2002

10/318583

Keith Lofstrom - Beaverton OR, US

ICID, LLC - Beaverton OR

G06F 17/50
G06F 19/00
G01R 31/02

716 4, 716 8, 700115, 702 73, 324764

An integrated circuit identification device (ICID) to be incorporated into an integrated circuit (IC) includes an array of electronic cells in which the magnitude of an output signal of each cell is a function of randomly occurring parametric variations which vary from cell-to-cell. The ICID also includes a circuit for measuring the output of each cell and for producing output data having a value reflecting the particular combination of measured characteristics of all of the elements of the array. When we make the number of elements in the array large enough, we insure that to a high degree of probability, the pattern of measured array cell characteristics for an ICID embedded in any one IC will be unique and distinguishable from such patterns measured by ICIDs embedded in millions of other ICs. Thus the value of the output data produced by an ICID circuit acts as a unique “fingerprint” for the IC in which it is installed, and can be used as a unique identification (ID) for that IC.

5428800, Jun 27, 1995

Oct 13, 1992

7/960965

Wen-Jai Hsieh - Vancouver WA
Yih-Chyun Jenq - Lake Oswego OR
Keith Lofstrom - Hillsboro OR

I-Cube, Inc. - Santa Clara CA

G06F 1300
H03K 1716

395775

A bi-directional buffer includes first and second unidirectional buffers connected for retransmitting signals in opposite directions between first and second buses. When an external bus driver pulls the first bus low, the first unidirectional buffer pulls the second bus low and generates a signal inhibiting the second unidirectional buffer from actively driving the first bus. When the external bus driver allows the first bus to return to the high logic level, the first unidirectional buffer temporarily supplies a high charging current to the second bus to quickly pull it up. Similarly, when an external bus driver pulls the second bus low, the second unidirectional buffer pulls the first bus low and generates a signal inhibiting the first unidirectional buffer from actively driving the second bus. When the external bus driver allows the second bus to return to the high logic level, the second buffer temporarily supplies a high charging current to the first bus to quickly pull it up. The bi-directional buffer includes a register for storing and reading out data representing successive logic states of a signal on the first bus, thereby providing a history of data appearing on the bus.

5402061, Mar 28, 1995

Aug 13, 1993

8/106006

James W. H. Marsh - Sherwood OR
Keith H. Lofstrom - Beaverton OR

Tektronix, Inc. - Wilsonville OR

G05F 316
G05F 320

323315

An improvement is provided for current sources of the type having three transistors configured as follows: The bases of the first (Q1) and second (Q2) transistors are tied together. The collector of the first transistor (Q1) is coupled to a first voltage (V. sub. CC,V. sub. EE) via a first resistor (R1). The emitter of the first transistor (Q1) is coupled to a second voltage (V. sub. EE,V. sub. CC) via a second resistor (R2). The collector of the second transistor (Q2) produces the output current (I. sub. OUT). The emitter of the second transistor (Q2) is coupled to the second voltage (V. sub. EE,V. sub. CC) via a third resistor (R3). The base of the third transistor (Q3) is coupled, either directly or indirectly through a fourth transistor (Q4), to the collector of the first transistor (Q1). The collector of the third transistor (Q3) is connected to the first voltage (V. sub. CC,V. sub. EE) and the emitter of that transistor (Q3) is connected to the bases of the first (Q1) and second (Q2) transistors.

5282271, Jan 25, 1994

Jul 6, 1992

7/912975

Wen-Jai Hsieh - Vancouver WA
Yih-Chyun Jeng - Lake Oswego OR
Keith Lofstrom - Hillsboro OR

I-CUBE Design Systems, Inc. - Santa Clara CA

G06F 1300

395275

A field programmable interconnect device (FPID) flexibly interconnects a set of electronic components such as integrated circuits and other devices to one another. The FPID is an integrated circuit chip including a set of ports and a cross-point switch that can be programmed to logically connect any one port to any other port. Each FPID buffer port may be programmed to operate in various modes including unidirectional and bi-directional, with or without tristate control, and to operate at various input or output logic levels with adjustable pull up currents. Each FPID buffer port may also be programmed to perform various operations on buffered signals including adjustably delaying the signal, inverting it or forcing it high or low. The FPID is linked to a host computer via a bus that permits the host computer to program the FPID to make the desired connections, to select various modes of operation of buffers within the FPID and to read out data stored in the FPID. Each port of an FPID also samples and stores data indicating states of the signal passing through it over the last several system clock cycles.

6161213, Dec 12, 2000

Feb 17, 1999

9/251692

Keith Lofstrom - Beaverton OR

Icid, LLC - Palo Alto CA

G06F 1750
G06F 1900
G01R 3102

716 4

An integrated circuit identification device (ICID) to be incorporated into an integrated circuit (IC) includes an array of electronic cells in which the magnitude of an output signal of each cell is a function of randomly occurring parametric variations which vary from cell-to-cell. The ICID also includes a circuit for measuring the output of each cell and for producing output data having a value reflecting the particular combination of measured characteristics of all of the elements of the array. When we make the number of elements in the array large enough, we insure that to a high degree of probability, the pattern of measured array cell characteristics for an ICID embedded in any one IC will be unique and distinguishable from such patterns measured by ICIDs embedded in millions of other ICs. Thus the value of the output data produced by an ICID circuit acts as a unique "fingerprint" for the IC in which it is installed, and can be used as a unique identification (ID) for that IC.

5202593, Apr 13, 1993

Oct 30, 1991

7/785299

Thomas B. Huang - San Jose CA
Yih-Chyun Jenq - Lake Oswego OR
Keith Lofstrom - Hillsboro OR

I-Cube Design Systems Inc. - Santa Clara CA
PiE Design Systems Inc. - Sunnyvale CA

H03K 170175
H03K 1716

307475

A bi-directional bus repeater includes two unidirectional bus repeaters connected for retransmitting signals in opposite directions between two buses. When an external bus driver pulls either bus low, one of the unidirectional bus repeaters pulls the other bus low. When the external bus driver allows the bus to rise to the high logic level, the unidirectional bus repeater temporarily supplies a high charging current to the other bus to quickly pull it up. Each unidirectional bus repeater also generates signals indicating when it is actively pulling its output bus up or down and the indicating signals inhibit one unidirectional bus repeater from actively driving its output when the other unidirectional bus repeater is actively driving its output.

5459466, Oct 17, 1995

Feb 23, 1995

8/393530

Daniel G. Knierim - Beaverton OR
Scott L. Williams - Beaverton OR
Keith H. Lofstrom - Beaverton OR

Tektronix, Inc. - Wilsonville OR

H03M 716

341160

A first subset of components of a first set of pairs of complementary differential electrical signals representative of a numerical value expressed in a multi-bit thermometer code, is processed in accordance with a first set of Boolean functions to produce a first set of output electrical signal components , and a second subset of components of the first set of pairs of complementary differential electrical signals is processed in accordance with a second set of Boolean functions to produce a second set of output electrical signal components. The first and second subsets and the first and second sets of Boolean functions are such that the first and second sets of output electrical signal components when combined form a second set of pairs of complementary differential electrical signals representative of the same numerical value expressed in a second multi-bit code with fewer bits than the multi-bit thermometer code.