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Kuljeet S SinghJamaica, NY

Kuljeet Singh Phones & Addresses

South Ozone Park, NY   

Elk Grove, CA   

Sacramento, CA   

Shoreline, WA   

5390 Yvonne Way, Sacramento, CA 95823   

Work

Position: Food Preparation and Serving Related Occupations

Education

Degree: Graduate or professional degree

Languages

English

Mentions for Kuljeet S Singh

Career records & work history

Medicine Doctors

Kuljeet Singh Photo 1

Kuljeet Singh, Federal Way WA - OD (Doctor of Optometry)

Specialties:
Optometry
Address:
31625 Pacific Hwy S Suite E1, Federal Way, WA 98003
253-9464392 (Phone)
Languages:
English

Kuljeet Singh resumes & CV records

Resumes

Kuljeet Singh Photo 38

Kuljeet Singh

Kuljeet Singh Photo 39

Kuljeet Singh

Kuljeet Singh Photo 40

Kuljeet Singh

Kuljeet Singh Photo 41

Web Designer And Developer

Work:

Web Designer and Developer
Kuljeet Singh Photo 42

Kuljeet Singh

Kuljeet Singh Photo 43

Kuljeet Singh

Publications & IP owners

Us Patents

Electronic Assembly Having A More Dense Arrangement Of Contacts That Allows For Routing Of Traces To The Contacts

US Patent:
6885102, Apr 26, 2005
Filed:
Aug 26, 2002
Appl. No.:
10/228524
Inventors:
Kuljeet Singh - Folsom CA, US
Kevin E. Wells - El Dorado Hills CA, US
Julius Delino - El Dorado Hills CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H05K001/16
US Classification:
257738, 257734, 257737, 257691, 257774, 257773, 257778, 257698, 174260
Abstract:
An electronic assembly is described, having a substrate and contacts on the substrate which are spaced and arranged in a manner that allows for a more dense arrangement of contacts but still allows for routing of traces between the contacts.

Electronic Assembly Having Select Spacing Of Rows And Columns Of Contacts To Allow For Routing Of Traces To The Contacts

US Patent:
7064431, Jun 20, 2006
Filed:
Nov 18, 2004
Appl. No.:
10/993866
Inventors:
Kuljeet Singh - Folsom CA, US
Kevin E. Wells - El Dorado Hills CA, US
Julius Delino - El Dorado Hills CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H05K 1/16
H01L 23/04
H01L 23/48
H01L 29/40
H01L 23/52
US Classification:
257734, 257737, 257738, 257778, 257691, 257773, 257775, 257698, 257693, 257692, 257784, 257780, 361777, 361778, 174260, 29830, 439627, 439284, 439290, 439291, 439678, 439907
Abstract:
An electronic assembly is described, having a substrate and contacts on the substrate which are spaced and arranged in a manner that allows for a more dense arrangement of contacts but still allows for routing of traces between the contacts.

Electronic Assembly Having A More Dense Arrangement Of Contacts That Allows For Routing Of Traces To The Contacts

US Patent:
7282796, Oct 16, 2007
Filed:
Nov 18, 2004
Appl. No.:
10/994057
Inventors:
Kuljeet Singh - Folsom CA, US
Kevin E. Wells - El Dorado Hills CA, US
Julius Delino - El Dorado Hills CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 23/04
H01L 23/48
H01L 23/52
US Classification:
257698, 257690, 257734, 257773, 257778, 361760, 361777, 174260, 174261
Abstract:
An electronic assembly is described, having a substrate and contacts on the substrate which are spaced and arranged in a manner that allows for a more dense arrangement of contacts but still allows for routing of traces between the contacts.

Plastic Ball Grid Array Package With Improved Moisture Resistance

US Patent:
6404067, Jun 11, 2002
Filed:
Jul 19, 2000
Appl. No.:
09/618968
Inventors:
Kuljeet Singh - Folsom CA
Joseph C. Barrett - El Dorado CA
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 2348
US Classification:
257784, 257684, 257701, 257787, 257780, 257698, 257774
Abstract:
An integrated circuit package including a substrate, an integrated circuit, and an encapsulant. The substrate has two opposing surfaces and an opening that extends between the two surfaces. The integrated circuit is mounted to the substrate substantially centered over the opening such that a portion of the opening is left uncovered by the integrated circuit. The encapsulant encapsulates the integrated circuit with a portion of the encapsulant extending between the two surfaces of the substrate and attached to the lower surface of the integrated circuit.

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