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Lawrence E Connell, 67Naperville, IL

Lawrence Connell Phones & Addresses

Naperville, IL   

Matthews, NC   

Plainfield, IL   

Hinsdale, IL   

2464 Rio Grande Cir, Naperville, IL 60565    630-7501121   

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Lawrence Connell Photo 1

Lawrence Connell - Lawyer

ISLN:
911408254
Admitted:
1979
University:
University of Delaware, A.B., 1975
Law School:
Wake Forest University, J.D., 1978

Lawrence Connell resumes & CV records

Resumes

Lawrence Connell Photo 21

Lawrence Connell

Industry:
Health, Wellness And Fitness
Skills:
Microsoft Office, Management, Microsoft Excel, Microsoft Word, Research, Powerpoint, Sales, Leadership, Training, Photoshop
Lawrence Connell Photo 22

Lawrence Connell

Location:
United States
Lawrence Connell Photo 23

Lawrence Connell

Location:
United States
Lawrence Connell Photo 24

Lawrence Connell

Location:
United States
Lawrence Connell Photo 25

Lawrence Connell

Location:
United States

Publications & IP owners

Us Patents

Buck Or Boost Power Converter

US Patent:
6348781, Feb 19, 2002
Filed:
Dec 11, 2000
Appl. No.:
09/733722
Inventors:
Pallab Midya - Schaumburg IL
Lawrence E. Connell - Naperville IL
Kenneth R. Haddad - Arlington Heights IL
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
G05F 1613
US Classification:
323224, 323283, 323259, 323222
Abstract:
A buck or boost (BOB) power converter circuit. A buck converter is cascaded with a boost converter to form a buck or boost circuit ( ). The BOB converter is controlled by a controller ( ) such that only the buck or boost converter is operating at any given time. A reference signal V can be applied to the controller ( ) such that the output voltage from the converter closely tracks the reference signal. Positive and negative ramp signals are generated and an error feedback signal is compared with the ramp signals to control the output in accord with V. This is useful in application of the output voltage as the power supply to an RF Power Amplifier ( ) so that the reference signal can represent the envelope of a signal to be transmitted and the RF PA ( ) can operate at high efficiency.

Low Power Voltage Regulator With Improved On-Chip Noise Isolation

US Patent:
6441594, Aug 27, 2002
Filed:
Apr 27, 2001
Appl. No.:
09/845059
Inventors:
Lawrence Edwin Connell - Naperville IL
Daniel Patrick McCarthy - Elk-Grove Village IL
Assignee:
Motorola Inc. - Schaumburg IL
International Classification:
G05F 140
US Classification:
323274, 323276
Abstract:
A voltage regulator for isolating radio frequency circuits from on chip digital circuit originated noise and an integrated circuit chip including the voltage regulator. The voltage regulator includes regulator device (a PFET) driven by a sense amplifier to derive a regulator voltage from a supply voltage. Another sense amplifier senses changes in output load and adjusts current flow through a current shunt so that the current shunt shunts excess load current. The sense amplifier driving the voltage regulator device senses current flow through the current shunt and adjusts the current supplied by the regulator device to reduce excess current. The current shunt is a series connected PFET and NFET diode , with the gate of the PFET driven to control current flow. Each of the sense amplifiers includes a pair of PFETs and a pair of NFETs , the drain of each PFET of the pair is tied to a corresponding drain of one of the pair of NFETs. A voltage divider connected between the regulator voltage and ground provides a sense voltage to the output sense amplifier so that the output sense amplifier compares the sense voltage against a reference voltage (VREF) to determine whether the regulator device is providing too much, not enough or just the right output current level.

Single Ended Input, Differential Output Amplifier

US Patent:
6559723, May 6, 2003
Filed:
Sep 4, 2001
Appl. No.:
09/946030
Inventors:
Neal W. Hollenbeck - Palatine IL
Lawrence Edwin Connell - Naperville IL
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H03F 304
US Classification:
330301, 330253, 330327, 330318
Abstract:
A single ended input differential output amplifier ( ) and integrated circuit including such an amplifier ( ). A pair of load resistors ( ) are connected between a supply voltage (V ) and differential outputs OUTP and OUTM. An inductor ( ) is connected between input RFIN and a source bias voltage V. A first field effect transistor (FET) ( ) is connected, drain to source, between load resistor ( ) at output OUTP and inductor ( ) at RFIN. A second FET ( ) is connected, drain to source, between the second load resistor ( ) at output OUTM and the source bias voltage V. A gate bias voltage V is connected to the gate of FET ( ) and through resistor ( ) to the gate of FET ( ). A coupling capacitor ( ) is connected between the input RFIN and the gate of FET ( ). The gate of FET ( ) may be connected to gate bias voltage V through a second gate bias resistor ( ) and a second coupling capacitor ( ) may couple the source of FET ( ) to the gate of FET ( ), thereby providing common mode rejection for noise, e. g. , substrate noise, experienced at inductor ( ).

Variable Gain Amplifier With Autobiasing Supply Regulation

US Patent:
6621348, Sep 16, 2003
Filed:
Oct 25, 2001
Appl. No.:
10/001388
Inventors:
Lawrence E. Connell - Naperville IL
Neal W. Hollenbeck - Palatine IL
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H03F 122
US Classification:
330296, 330285, 330311
Abstract:
A high gain wide-band width RF amplifier with automatic bias supply regulation. The load supply is actively adjusted in response to the amplifiers output signal level. At small output signals effective load supply voltage is minimum and at larger output signals the effective load supply voltages is maximized. The amplifier includes a differential pair of field effect transistors (FETs) connected at common source connection and biased by current bias FET which is connected between common source connection and amplifier signal input RFIN. A bias voltage (V ) is applied to the gate of bias device and an automatic gain control voltage (V ) is applied to the gates of differential FET pair. The automatic bias supply circuit is an active load and includes resistors , capacitor and a differential amplifier. Capacitor is connected between the negative input and the output of differential amplifier.

Multiphase Voltage Controlled Oscillator

US Patent:
6657502, Dec 2, 2003
Filed:
Oct 1, 2001
Appl. No.:
09/968171
Inventors:
Michael L. Bushman - Hanover Park IL
Lawrence E. Connell - Hanover Park IL
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H03B 2700
US Classification:
331 57, 331 45, 331135, 331175
Abstract:
A multiphase voltage controlled oscillator (e. g. , a quadrature VCO) which includes multiple voltage controllable transconductance phase drivers and The output of each voltage controllable transconductance phase driver supplies one of 4 oscillator phases and receives 2 of the 4 phases as inputs. Each of the voltage controllable transconductance phase drivers and corresponds to a pair of controllable transconductance inverting amplifiers The controllable transconductance inverting amplifiers may be a simple inverter that includes N-type FET (NFET) and P-type FET (PFET) Transconductance is controlled in the simple inverter by raising or lowering supply voltage (V ) levels. A more complex controllable transconductance inverting amplifier may be used, replacing PFET with series connected PFETs The gate of one PFET is controlled by a bias control voltage V. For additional sensitivity and control PFETs may each be replaced with parallel pairs of PFETs and In addition to a quadrature VCO, an N phase oscillator may be formed with each phase generated by a controllable transconductance functional block, appropriately selecting block inputs from output phases.

Offset Compensated Differential Amplifier

US Patent:
6750704, Jun 15, 2004
Filed:
Jan 9, 2003
Appl. No.:
10/340335
Inventors:
Lawrence Edwin Connell - Naperville IL
Craig S. Petrie - Provo UT
Matthew R. Miller - Palatine IL
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H03F 102
US Classification:
330 9, 330 51, 330253, 330258
Abstract:
A differential amplifier comprises a differential input stage including first and second input devices and has first and second input electrodes and first and second output terminals. A differential load stage includes first and second load devices having first and second control electrodes respectively. The load stage is coupled to the differential input stage and to the first and second output terminals. First and second separate capacitive biasing networks are coupled to the first and second output terminals and respectively to the first and second control electrodes. During an offset-cancellation phase, the input electrodes are coupled to a common voltage. During an amplification phase, a differential input signal is applied to the input electrodes.

High Performance Integrated Circuit Regulator With Substrate Transient Suppression

US Patent:
6920316, Jul 19, 2005
Filed:
Sep 4, 2001
Appl. No.:
09/946010
Inventors:
Lawrence Edwin Connell - Naperville IL, US
Neal W. Hollenbeck - Palatine IL, US
Michael Lee Bushman - Hanover Park IL, US
Daniel Patrick McCarthy - Elk Grove Village IL, US
Assignee:
Freescale Semiconductor, Inc. - Austin TX
International Classification:
H04B001/26
H04B001/18
US Classification:
4551831, 4551801, 4551821, 4551951, 4551961
Abstract:
A regulation circuit, incorporated in a single integrated circuit with a first circuit load, which as an input coupled to a power supply which produces a source voltage, and a first output coupled to the first circuit load. The regulation circuit comprises an input capacitor for reducing the magnitude of a voltage change at the first output, and at least a first voltage regulator for producing a predetermined voltage at the first load.

Dual Steered Frequency Synthesizer

US Patent:
6990164, Jan 24, 2006
Filed:
Oct 1, 2001
Appl. No.:
09/968178
Inventors:
Michael L. Bushman - Hanover Park IL, US
Lawrence E. Connell - Naperville IL, US
Assignee:
Freescale Semiconductor, Inc. - Austin TX
International Classification:
H03D 3/24
US Classification:
375376, 327156, 455260
Abstract:
A frequency synthesizer comprising a charge pump , a loop filter , a loop divider , and an active and dual port VCO. An integrator low pass filters a steering voltage to provide a low frequency path while the steering voltage provides a high frequency path. Both steering paths are connected to dual port VCO. The dual port VCO is a single frequency generator which is controlled by two control signals. The dual port VCO , effectively provides the equivalent of a low frequency path and a high frequency noise compensation path , both paths effectively merging by superposition.

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