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Larry J Mosley, 65Chandler, AZ

Larry Mosley Phones & Addresses

Chandler, AZ   

Gilbert, AZ   

Mesa, AZ   

299 W 14Th St, Holland, MI 49423   

Saugatuck, MI   

1180 Matt Urban Dr APT 523, Holland, MI 49423    616-8229163   

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Position: Service Occupations

Education

Degree: High school graduate or higher

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Us Patents

Multiple Tier Array Capacitor

US Patent:
6532143, Mar 11, 2003
Filed:
Dec 29, 2000
Appl. No.:
09/751612
Inventors:
David G. Figueroa - Mesa AZ
Kishore K. Chakravorty - San Jose CA
Huong T. Do - Scottsdale AZ
Larry Eugene Mosley - Sunnyvale CA
Jorge Pedro Rodriguez - Chandler AZ
Ken Brown - Mesa AZ
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01G 430
US Classification:
3613014, 3613063, 361303, 361387, 361718, 257296, 257297
Abstract:
A capacitor includes multiple tiers ( , FIGS. ), which provide capacitance to a load at different inductance values. Each tier includes multiple layers ( , FIGS. ) of patterned conductive material, which are separated by layers of dielectric material. In one embodiment, tiers are stacked in a vertical direction, and are electrically connected through vias ( , FIGS. ) that extend through some or all of the tiers. In another embodiment, one or more tiers ( , FIG. ) are located in a center region ( , FIG. ) of the capacitor, and one or more other tiers ( , FIG. ) are located in a peripheral region ( , FIG. ) of the capacitor. In that embodiment, the center tiers and peripheral tiers are electrically connected through one or more additional layers ( , FIG. ) of patterned conductive material. The capacitors of the various embodiments can be used as discrete devices, which are mountable on or embeddable within a housing (e. g.

Integrated Circuit Package Substrate Having A Thin Film Capacitor Structure

US Patent:
7099139, Aug 29, 2006
Filed:
Mar 17, 2004
Appl. No.:
10/803789
Inventors:
Cengiz A. Palanduz - Chandler AZ, US
Larry E. Mosley - Santa Clara CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01G 4/228
US Classification:
3613062, 361302, 361303, 361305, 3613211, 3613212
Abstract:
A base structure is formed from a green material having first and second opposing sides and having a plurality of via openings therein. The green material is then sintered so that the green material becomes a sintered ceramic material and the base structure becomes a sintered ceramic base structure having the via openings. A conductive via is formed in each via opening of the sintered ceramic base structure. First and second capacitor structures are formed on the sintered ceramic base structure, each on a respective side of the sintered ceramic base structure. The power and ground planes of the capacitor structure are connected to the vias. As such, a capacitor structure can be formed and connected to the vias without the need to drill via openings in brittle substrates such as silicon substrates. Capacitor structures on opposing sides provide more capacitance without manufacturing complexities associated with the manufacture of one capacitor structure having a large number of power and ground planes.

Array Capacitor With Ic Contacts And Applications

US Patent:
7173804, Feb 6, 2007
Filed:
Sep 28, 2004
Appl. No.:
10/952968
Inventors:
Kaladhar Radhakrishnan - Chandler AZ, US
Larry E. Mosley - Santa Clara CA, US
Dustin P. Wood - Chandler AZ, US
Nicholas L. Holmberg - Gilbert AZ, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01G 4/228
US Classification:
3613061, 361329
Abstract:
An apparatus having a first set of contacts on a first side of the apparatus adapted to interface with a corresponding plurality of contacts on an integrated circuit package. The apparatus further includes a second set of contacts on a second side of the apparatus adapted to interface with a corresponding plurality of grid array leads, and a plurality of capacitive storage structures coupled to the first and second sets of contacts.

Method Forming Split Thin Film Capacitors With Multiple Voltages

US Patent:
7216406, May 15, 2007
Filed:
Sep 29, 2004
Appl. No.:
10/954644
Inventors:
Cengiz A. Palanduz - Chandler AZ, US
Larry E. Mosley - Santa Clara CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H04R 17/00
H01G 4/06
US Classification:
29 2535, 29 2541, 29 2542, 29830, 29831, 29832, 3613212, 3613061
Abstract:
A method for forming a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit such as a microprocessor, that may need a closely coupled capacitor supplying and moderating power to the microprocessor in order to quickly respond to instantaneous power demands that may be found in high clock rate devices. The method may supply a lower voltage power supply level for minimum sized transistors in the fast core logic portions of the microprocessor, and a higher voltage power supply level for the cache memory and I/O transistors.

Split Thin Film Capacitor For Multiple Voltages

US Patent:
7586756, Sep 8, 2009
Filed:
Aug 8, 2006
Appl. No.:
11/463130
Inventors:
Cengiz A. Palanduz - Chandler AZ, US
Larry E. Mosley - Santa Clara CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H05K 1/11
H05K 1/14
US Classification:
361792, 361760, 361765, 361785
Abstract:
An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted. The microprocessor may use a lower voltage power supply level for minimum sized fast transistors in the fast core logic portions of the microprocessor, and a more normal voltage power supply voltage level for the cache memory and I/O transistor portions of the microprocessor. Thus a compact capacitor with multiple power and reference supply levels may be needed to provide the required power for a high frequency IC.

Method Of Forming A Thin Film Capacitor

US Patent:
7810234, Oct 12, 2010
Filed:
Apr 10, 2007
Appl. No.:
11/733266
Inventors:
Cengiz A. Palanduz - Chandler AZ, US
Larry E. Mosley - Santa Clara CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H05K 3/30
H01G 4/28
US Classification:
29832, 29 2535, 29 2541, 29830, 29831, 3613061
Abstract:
An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted. The microprocessor may use a lower voltage power supply level for minimum sized fast transistors in the fast core logic portions of the microprocessor, and a more normal voltage power supply voltage level for the cache memory and I/O transistor portions of the microprocessor. Thus a compact capacitor with multiple power and reference supply levels may be needed to provide the required power for a high frequency IC.

Split Thin Film Capacitor For Multiple Voltages

US Patent:
7986532, Jul 26, 2011
Filed:
Jul 27, 2009
Appl. No.:
12/509666
Inventors:
Cengiz A. Palanduz - Chandler AZ, US
Larry E. Mosley - Santa Clara CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H05K 1/11
H05K 1/14
US Classification:
361792, 3613063, 361763, 361766
Abstract:
An apparatus includes a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits. Such capacitor may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted. The microprocessor may use a lower voltage power supply level for minimum sized fast transistors in the fast core logic portions of the microprocessor, and a more normal voltage power supply voltage level for the cache memory and I/0 transistor portions of the microprocessor. Thus a compact capacitor with multiple power and reference supply levels may be needed to provide the required power for a high frequency IC.

Method And Apparatus For A Microprocessor To Enter And Exit A Reduced Power Consumption State

US Patent:
5537656, Jul 16, 1996
Filed:
Jun 17, 1994
Appl. No.:
8/261456
Inventors:
Thomas J. Mozdzen - Gilbert AZ
Larry E. Mosley - Phoenix AZ
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 1300
US Classification:
395750
Abstract:
A method and apparatus for placing a microprocessor in and out of a reduced power consumption state utilizing system interrupts in a computer system. The method of the present invention intercepts instructions being executed by the processor before placing the processor in a reduced power consumption state. On a request for the processor to exit the reduced power consumption state, the method of the present inventions allows the processor to execute pre-determined resume instructions to wait out any voltage level fluctuations in the processor as it exits the reduced power consumption state, before allowing the processor to continue execution of the instructions intercepted prior to placing the processor in the reduced power consumption state.

Amazon

Larry Mosley Photo 44

Letters From A Russian Family To An American Pastor (Contemporary Russian Series)

Author:
Larry Mosley, George Baskin
Publisher:
Russian Resources Press, Inc.
Binding:
Paperback
Pages:
103
ISBN #:
0965270017
EAN Code:
9780965270014
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