Lei Luo, 48530 Dairy Glen Rd, Chapel Hill, NC 27516

8198930, Jun 12, 2012

Oct 27, 2010

12/913754

Jared Zerbe - Woodside CA, US
Brian Leibowitz - San Francisco CA, US
Lei Luo - Durham NC, US
John Wilson - Raleigh NC, US
Anshuman Bhuyan - Stanford CA, US
Marko Aleksic - Mountain View CA, US

Rambus Inc. - Sunnyvale CA

H03H 11/26

327261, 327158, 327276

A system for compensating for power-supply-induced jitter (PSIJ) in a chain of clock buffers within an integrated circuit is described. During operation, the system couples a first supply voltage from a first voltage source to a supply node of each clock buffer in a first chain of clock buffers. Note that a change in the first supply voltage causes a change in a first propagation delay associated with the first chain of the clock buffers. The system also couples a second chain of clock buffers in series with the first chain of clock buffers. The system then couples the first voltage source to each clock buffer in the second chain of clock buffers through coupling circuitry. Next, the system adjusts the coupling circuitry so that the change in the first supply voltage from the first voltage source causes a change in a second propagation delay associated with the second chain of the clock buffers, wherein the change in the first propagation delay and the change in the second propagation delay are complementary.

8462891, Jun 11, 2013

Feb 19, 2009

12/920806

Jade M. Kizer - Windsor CO, US
John Wilson - Raleigh NC, US
Lei Luo - Durham NC, US
Frederick Ware - Los Altos Hills CA, US
Jared L. Zerbe - Woodside CA, US

Rambus Inc. - Sunnyvale CA

H04L 27/06

375340, 375257, 375264, 375286, 375288, 375295, 375316, 375318, 341 55, 341 56, 341143

Embodiments of a circuit are described. In this circuit, a receive circuit includes M input nodes that receive a set of M symbols on M links during a time interval, where the set of M symbols are associated with a codeword. Moreover, the receive circuit includes a decoder, coupled to the M input nodes, that determines the codeword in a code space based on the set of M symbols and that decodes the codeword to a corresponding set of N decoded symbols. Additionally, the receive circuit may include a detector that detects an imbalance in a number of instances of a first value in the set of M symbols and a number of instances of a second value in the set of M symbols, and, if an imbalance is detected, that asserts an error condition.

8498344, Jul 30, 2013

Jun 18, 2009

12/999495

John M. Wilson - Raleigh NC, US
Aliazam Abbasfar - Menlo Park CA, US
John Eble, III - Chapel Hill NC, US
Lei Luo - Durham NC, US
Jade M. Kizer - Durham NC, US
Carl William Werner - Los Gatos CA, US
Wayne Dettloff - Cary NC, US

Rambus Inc. - Sunnyvale CA

H04B 3/00
H04L 25/00

375257, 341 51

A data system permits bus encoding based on frequency of the bus; an encoding scheme may be implemented to avoid undesirable frequency conditions such as a resonant condition that may lead to degradation in system performance. The device or integrated circuit will typically include an encoder; in one embodiment, the encoder is a data bus inversion (DBI) circuit that selectively inverts all lines of a data bus. A detector that may include a band-pass or stop-band filter that, for example, evaluates data for transmission on the bus to detect frequency, for example, a predetermined frequency or a frequency range. The detector provides a control signal for the encoder to selectively apply an encoding scheme as a function of frequency.

8581920, Nov 12, 2013

Sep 12, 2008

12/210104

Lei Luo - Durham NC, US
Frederick A. Ware - Los Altos Hill CA, US
John Wilson - Raleigh NC, US
Jade M. Kizer - Durham NC, US

Rambus Inc. - Sunnyvale CA

G09G 5/37
G06T 1/60

345563, 345530, 345561

Embodiments of an apparatus that uses unused masked data bits during an access to a memory are described. This apparatus includes a selection circuit, which selects data bits to be driven on data lines during the access to the memory. This selection circuit includes a control input that receives a data mask signal, which indicates whether a set of data bits is to be masked during the access to the memory. During the access to the memory, the selection circuit selects either the set of data bits to be driven when the data mask signal is not asserted, or an alternative set of values to be driven when the data mask signal is asserted.

8588280, Nov 19, 2013

Dec 19, 2008

12/809000

Kyung Suk Oh - Cupertino CA, US
John Wilson - Raleigh NC, US
Frederick A. Ware - Los Altos Hills CA, US
WooPoung Kim - Plano TX, US
Jade M. Kizer - Windsor CO, US
Brian S. Leibowitz - San Francisco CA, US
Lei Luo - Durham NC, US
John Cronan Eble - Chapel Hill NC, US

Rambus Inc. - Sunnyvale CA

H04B 1/38
H04L 5/16

375219, 375259

Embodiments of a system that communicates bidirectional data between two devices via shared links is described. In this system, data is transmitted on the shared links by one of the devices using single-ended drivers, and corresponding symbols are received on the shared links by the other device using differential comparison circuits. The data may be encoded as a series of parallel codewords prior to transmission. Each shared link may communicate a respective symbol in each codeword, which can have one of two possible logical values (e. g. , a logic 0 or a logic 1). The corresponding symbols received by the other device may comprise a parallel symbol set, and each of the differential comparison circuits may compare symbols received on pairs of the shared links. A decoder in the other device may decode a respective parallel symbol set from the outputs of the differential comparison circuits to recover the encoded data.

8618869, Dec 31, 2013

Dec 30, 2011

13/341483

Wayne Dettloff - Cary NC, US
John Wilson - Raleigh NC, US
Lei Luo - Durham NC, US
Brian Leibowitz - San Francisco CA, US
Jared Zerbe - Woodside CA, US
Pravin Kumar Venkatesan - Bangalore, IN

Rambus Inc. - Sunnyvale CA

G05F 1/10

327538, 323316

Conventional bias circuits exhibit a number of limitations, including the time required to power-up a bias circuit following a low-power state. Large current surges in the supply network induce ringing, further complicating a power-up process. Example embodiments reduce power-up time and minimize current surges in the supply by selectively charging and discharging capacitance to the circuit during power-up and power-down of the bias circuit.

2009005, Mar 5, 2009

Sep 4, 2008

12/204728

Frederick Ware - Los Altos Hills CA, US
John Wilson - Raleigh NC, US
Jade M. Kizer - Durham NC, US
Lei Luo - Durham NC, US
John W. Poulton - Chapel Hill NC, US
Ian Shaeffer - Los Gatos CA, US

Rambus Inc. - Los Altos CA

G11C 5/06
G11C 7/00
G11C 8/00

365 63, 36523005, 365193, 365191, 36518902

A memory controller operates in two modes to support different types of memory devices. In a first mode, the memory controller distributes a dedicated reference voltage with each of a plurality of signal bundles to a corresponding plurality of memory devices. The reference voltages are conveyed using pads that are alternatively used for e.g. timing-reference signals in a second mode, so the provision for bundle-specific reference voltages need not increase the number of pads on the memory controller.

2011006, Mar 24, 2011

Jun 9, 2009

12/993843

John Michael Wilson - Raleigh NC, US
Lei Luo - Durham NC, US

RAMBUS Inc. - Sunnyvale CA

H04L 27/00

375295

This disclosure presents a method of canceling inductance-dominated crosstalk using a capacitive coupling circuit; it also presents a method of calibrating, selecting and programming a capacitance value used for coupling, so as to add a derivative of each aggressor signal to each victim signal, and thereby negate crosstalk that would otherwise be seen by a given receiver. In the context of a multiple-line bus, cross-coupling circuits may be used between each pair of “nearest neighbors,” with values calibrated and used for each particular transmitter-receiver pair. Embodiments are also presented which address crosstalk induced between lines that are not nearest neighbors, such as, for example, for use in a differential signaling system.