Kuok Young Ling, 601801 Vetta Dr, Livermore, CA 94550

6392263, May 21, 2002

May 15, 2001

09/855251

Zhiliang J. Chen - Plano TX
Kuok Y. Ling - Plano TX
Hisashi Shichijo - Plano TX
Katsuo Komatsuzaki - Ibaraki, JP
Chin-Yu Tsai - Plano TX

Texas Instruments Incorporated - Dallas TX

H01L 2972

257292, 257232, 257233, 257290, 257291, 257369, 257371

A densely integrated pixel, fabricated by CMOS technology, comprises a photodiode formed by a n-well, with cathode, surrounded by a p-well; a reset MOS transistor formed such that its polysilicon gate is positioned, for diode control, across the junction formed by p-well and n-well regions, and its source is merged with the photodiode cathode; and a sensing MOS transistor formed such that its source is combined with the drain of the reset transistor and its gate is electrically connected to the source of the reset transistor. In the pixel of the invention, the photodiode leakage current is greatly reduced, because no n+/p-well junction is connected to the photodiode, and the fill factor is improved, because the pixel size is much reduced.

6512280, Jan 28, 2003

May 16, 2001

09/859121

Zhiliang J. Chen - Plano TX
Kuok Y. Ling - Plano TX
Hisashi Shichijo - Plano TX
Katsuo Komatsuzaki - Niihari-mura, JP
Chin-Yu Tsai - Plano TX

Texas Instruments Incorporated - Dallas TX

H01L 31072

257465, 257292, 257462

A light-sensing diode fabricated in a semiconductor substrate having a surface protected by an insulator, comprising a first region of one conductivity type in this substrate, a second region of the opposite conductivity type forming a junction with the first region in the substrate; this junction having a convoluted shape, providing two portions generally parallel to the surface, and a constricted intersection with the surface; and a gate for applying electrical bias across the junction, this gate positioned on the insulator such that it covers all portions of the junction intersection with the surface, thereby creating a gate-controlled photodiode.

6621064, Sep 16, 2003

May 3, 2001

09/848637

Zhiliang J. Chen - Plano TX
Kuok Y. Ling - Plano TX
Hisashi Shichijo - Plano TX
Katsuo Komatsuzaki - Niihari-mura, JP
Chin-Yu Tsai - Plano TX

Texas Instruments Incorporated - Dallas TX

H01L 3100

2502141, 257465, 257292, 2502081, 348308

A light-sensing diode having improved efficiency due to an extended junction geometry that provides more than one level of interaction with the light input.

6690242, Feb 10, 2004

Jan 29, 2002

10/059626

Lieyi Fang - Plano TX
Charles M. Branch - Frisco TX
Kuok Young Ling - Calabasas CA
Feng Ying - Plano TX

Texas Instruments Incorporated - Dallas TX

H03B 2700

331 57, 331116 FE, 327256

A circuit for providing a symmetrical output signal to a communication system. The circuit includes an input circuit ( and ) for receiving an input signal and a symmetry circuits ( and ) advantageously configured to provide an output signal exhibiting a symmetrical rising and falling edge waveform in response to the received input signal. An integrated power source (I ) provides current to a common node (N ) in which current is advantageously steered to each half circuit ( and ) to reduce voltage variation on the common node during voltage transition of the input signal, hence, reducing current fluctuation from the current source.

6753202, Jun 22, 2004

May 28, 2003

10/446910

Zhiliang J. Chen - Plano TX
Kuok Y. Ling - Plano TX
Hisashi Shichijo - Plano TX
Katsuo Komatsuzaki - Ibaraki, JP
Chin-Yu Tsai - Plano TX

Texas Instruments Incorporated - Dallas TX

H01L 2100

438 48, 257292, 257431, 257465

A method for the fabrication of a light-sensing diode in a high-resistivity semiconductor substrate. A high-energy implant of ions into the substrate is patterned to form an annular well of the same conductivity type as the substrate; followed by a second high-energy implant of the opposite conductivity type, within the center of the annulus; followed by a third implant, of lower energy and high dosage, to form a region of the first conductivity type extending laterally near the substrate surface. The resulting diode junction is thereby patterned to include two planes near the substrate surface, allowing incident light to traverse the junction twice.

5257175, Oct 26, 1993

May 8, 1992

7/880956

Dale J. Skelton - Plano TX
Kuok Y. Ling - Webster TX
Myron G. Manternach - Houston TX

Texas Instruments Incorporated - Dallas TX

H02M 75387

363 56

A voltage regulation circuit for use in "H" bridge circuit applications utilizes feedback networks to provide analog voltage regulation of the output nodes during switching of inductive loads. The regulation of the ouptut nodes during switching of inductive loads eliminates substrate current injection.

5977898, Nov 2, 1999

Dec 22, 1997

8/996259

Kuok Young Ling - Plano TX
Chong In Chi - Plano TX

Texas Instruments Incorporated - Dallas TX

H03M 166
H03M 136

341144

A decoding scheme for a dual string DAC which reduces the size of the decoding logic while also reducing the number of switches between the two strings of resistors and also eliminating the need for Op-amps between the coarse and fine resistor strings. The present invention provides a decoding circuit to select adjacent pairs of taps 24 of the coarse resistor string 12 using simple decoding blocks 36. In one embodiment of the present invention, a 14 bit decoder is constructed with a course decoding logic of four 3-bit decoders, two levels of switches, an add-one circuit, a multiplexer, and a small amount of overflow logic. An advantage of the present invention is reduced area and power needed to implement the decoding logic for a decoder having only two levels of switches between the coarse and fine resistor strings.

5493189, Feb 20, 1996

Dec 17, 1993

8/169871

Kuok Y. Ling - Coppell TX
William Krenik - Garland TX

Texas Instruments Incorporated - Dallas TX

H02P 118

318254

A switching scheme for driving a three-phase DC motor includes a first end of a first coil 20 coupled to a first end of a second coil 22 and a first end of a third coil 24. A first high side transistor 32 is coupled between a voltage source and a second end of the first coil 20. A second high side transistor 34 is coupled between the voltage source and a second end of the second coil 22. A third high side transistor 36 is coupled between the voltage source and a second end of the third coil 24. A first low side transistor 38 is coupled between the second end of the first coil 20 and a resistor 56. A second low side transistor 40 is coupled between the second end of the second coil 22 and the resistor 56. A third low side transistor 42 is coupled between the second end of the third coil 24 and the resistor 56. An output of a first low side driver 26 is coupled to a gate of the first low side transistor 38.