Career records & work history
Lawyers & Attorneys
Mark Wingo Greenstreet - Lawyer
Licenses:
Virginia - Authorized to practice law 1982
Mark Russell Greenstreet, 653813 Magrath Rd, Bellingham, WA 98226
Mark Greenstreet Phones & Addresses
3813 Magrath Rd, Bellingham, WA 98226 360-7148235
Palo Alto, CA
2400 Jefferson Ave, Berkeley, CA 94703 510-8459646
Princeton, NJ
Oak Harbor, WA
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Mark Russell Greenstreet
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Position:
Educator
Ranks
Licence:
Virginia - Authorized to practice law
Date:
1982
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Mark Greenstreet
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Mark Greenstreet
Mark Greenstreet is a British actor who first came to prominence in the 1985 BBC television serial Brat Farrar. First and foremost a stage actor, ...
Us Patents
Squared-Radix Discrete Fourier Transform
US Patent:
4768159, Aug 30, 1988
Filed:
Jul 20, 1987
Appl. No.:
7/077048
Inventors:
Joseph H. Gray - Berkely CA
Mark R. Greenstreet - Palo Alto CA
Mark R. Greenstreet - Palo Alto CA
Assignee:
TRW Inc. - Redondo Beach CA
International Classification:
G06F 15332
US Classification:
364726
Abstract:
A radix-N. sup. 2 or radix-N. sup. 4 discrete Fourier transform (DFT) processor having cascaded stages alternately comprising N. sup. 2 -sample memories and radix-N DFT's. Data is written into and read from the memories in a sequence permitting data to be written into a memory address immediately after the previously stored data is read from the same memory address, thereby avoiding the need for double-buffered memory. In one embodiment of the invention, two radix-N. sup. 2 processors are cascaded to produce a radix-N. sup. 4 DFT processor with even greater memory savings.
Fast Fourier Transform Architecture Using Hybrid N-Bit-Serial Arithmetic
US Patent:
4868776, Sep 19, 1989
Filed:
Sep 14, 1987
Appl. No.:
7/059097
Inventors:
Joseph H. Gray - Palo Alto CA
Mark R. Greenstreet - Princeton NJ
Lars M. Jorgensen - San Jose CA
Mark R. Greenstreet - Princeton NJ
Lars M. Jorgensen - San Jose CA
Assignee:
TRW Inc. - Redondo Beach CA
International Classification:
G06F 15332
US Classification:
364726
Abstract:
A fast Fourier transform circuit, including an illustrative radix-eight discrete Fourier transform (DFT) kernel that operates on an n-bit-serial data format, for an efficient serial-like, pipelined operation within the DFT. The circuit performs a four-point DFT on half of the input data words at a time, stores intermediate results from the four-point DFT in a commutation stage, then combines the intermediate results in two two-point DFTs. Internal multiplication in the eight-point DFT is effected in delay registers that also serve to store the intermediate results, thereby providing an economy of timing and circuit routing. Interleaving and deinterleaving operations convert the data format between three-bit-serial and conventional bit-parallel used outside the eight-point DFT kernel, which may therefore be easily cascaded for more complex FFT operations. The DFT kernel also includes means for selectively bypassing butterfly computation modules to perform shorter-length DFTs.
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