Michael Darnall resumes & CV records
Resumes
Michael Eugene Darnall, 534909 Sandy Ln, San Jose, CA 95124
Michael Darnall Phones & Addresses
4909 Sandy Ln, San Jose, CA 95124
1297 Bretmoor Way, San Jose, CA 95129
234 Gomes Ct, Campbell, CA 95008
Lexington, SC
Davis, CA
Auburn, CA
Social networks
Michael Eugene Darnall
Linkedin
Mentions for Michael Eugene Darnall
Publications & IP owners
Us Patents
Co-Simulation Via Boundary Scan Interface
US Patent:
7184946, Feb 27, 2007
Filed:
Jun 19, 2003
Appl. No.:
10/600885
Inventors:
Jonathan B. Ballagh - Longmont CO, US
Nabeel Shirazi - San Jose CA, US
Christopher N. Battson - San Francisco CA, US
Michael E. Darnall - Campbell CA, US
Bradley K. Fross - Claremont CA, US
Nabeel Shirazi - San Jose CA, US
Christopher N. Battson - San Francisco CA, US
Michael E. Darnall - Campbell CA, US
Bradley K. Fross - Claremont CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G06F 9/455
US Classification:
703 23, 703 27, 703 28, 703 22, 703 14, 716 1, 716 8, 717135
Abstract:
Method and apparatus for interfacing a high-level modeling system (HLMS) with a reconfigurable hardware platform for co-simulation. In one embodiment a boundary-scan interface is coupled to the HLMS and is configured to translate HLMS-issued commands to signals generally compliant with a boundary-scan protocol, and translate signals generally compliant with a boundary-scan protocol to data compatible with the HLMS. A translator and a wrapper are implemented for configuration of the hardware platform. The translator translates between signals that generally compliant with the boundary-scan protocol and signals that are compliant with a second protocol. A component to be co-simulated is instantiated within the wrapper, and the wrapper transfers signals between the translator and the component.
Generic Software Simulation Interface For Integrated Circuits
US Patent:
8041553, Oct 18, 2011
Filed:
Feb 29, 2008
Appl. No.:
12/040299
Inventors:
Adrian M. Hernandez - Longmont CO, US
Michael E. Darnall - San Jose CA, US
Michael E. Darnall - San Jose CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G06F 17/50
US Classification:
703 14, 714 30, 714733, 714734, 716106, 716136, 719324
Abstract:
A computer-based system for testing a circuit design for implementation within an integrated circuit device can include a design application () providing simulation instructions for testing a circuit design and a simulation driver () receiving the simulation instructions and translating the simulation instructions into control protocol instructions specifying operations of an integrated circuit control protocol. The system can include a simulation environment (). The simulation environment can include a communication module () communicating with the simulation driver, a simulation cable driver () receiving the control protocol instructions from the simulation driver via the communication module, and a control module (). The simulation cable driver further can translate the control protocol instructions into signaling information corresponding to the integrated circuit control protocol. The control module can include a plurality of ports receiving the signaling information and outputting the signaling information to a device under test within the simulation environment.
NOTICE: You may not use BackgroundCheck or the information it provides to make decisions about employment, credit, housing or any other purpose that would require Fair Credit Reporting Act (FCRA) compliance. BackgroundCheck is not a Consumer Reporting Agency (CRA) as defined by the FCRA and does not provide consumer reports.