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Mitsuru Hirano, 70Santa Clara, CA

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Us Patents

Multiple Resistivity Wiring Apparatus

US Patent:
5060049, Oct 22, 1991
Filed:
Jul 18, 1990
Appl. No.:
7/553804
Inventors:
Kozo Yamasaki - Gifu, JP
Kouichi Mouri - Aichi, JP
Naomiki Kato - Aichi, JP
Mitsuru Hirano - Santa Clara CA
Michael A. Schmitt - Chandler AZ
Bidyut Bhattacharyya - Chandler AZ
Assignee:
NGK Spark Plug Co., Ltd. - Aichi
NGK Spark Plugs (U.S.A.), Inc. - Torrance CA
Intel Corporation - Chandler AZ
International Classification:
H01L 2354
H01L 2314
US Classification:
357 70
Abstract:
A ceramic multilayer wiring substrate is provided on which the metallized wirings are partially altered to provide multiple resistivities without changing the other electrical properties associated with a particular physical wiring geometry. Sequentially positioning conductive materials of different resistivities along the length of each individual wiring produces a final wiring pattern where each individual wiring can have a different resistance from the other wirings. A multiple resistivity wiring pattern can maximize the operation of a semiconductor chip attached thereto, for example, by reducing the effect of electronic noise on the semiconductor.

Alumina Multilayer Wiring Substrate Provided With High Dielectric Material Layer

US Patent:
5099388, Mar 24, 1992
Filed:
Jun 15, 1990
Appl. No.:
7/538334
Inventors:
Masahiro Ogawa - Aichi, JP
Kozo Yamasaki - Gifu; both of, JP
Mitsuru Hirano - Santa Clara CA
Michael A. Schmitt - Chandler AZ
Bidyut K. Bhattacharyya - Chandler AZ
Assignee:
NGK Spark Plug Co., Ltd. - Aichi
NGK Spark Plugs (U.S.A.), Inc. - Torrance CA
Intel Corporation - Chandler AZ
International Classification:
H01G 410
US Classification:
361321
Abstract:
An alumina multilayer wiring substrate having a high dielectric, low inductance capacitor in the substrate on which a VLSI is to be mounted to effectively eliminate electrical noise(s) which may hinder the operation of the VLSI at high speed (frequency) is provided.

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