Work:
Allegro Microsystems, Llc
Nvm and Vm Memory Leader, Technology Development Group
Allegro Microsystems, Llc
Jul 2008 - Jun 2013
Senior Memory Design Engineer
Ecpi University
May 2010 - May 2013
Adjunct Instructor
Allegro Microsystems, Llc
Jun 2003 - Jun 2008
Hardware and Eda Engineer
Itt Technical Institute
Nov 2005 - Nov 2007
Adjunct Instructor
Teryon Communications
Jul 2002 - May 2003
Analog Design Engineer
Cadence Design Systems
Jul 2001 - Jul 2002
Application Engineer
Education:
University of Central Florida 1999 - 2001
Masters, Master of Science In Electrical Engineering
Bangladesh University of Engineering and Technology 1993 - 1998
Bachelors, Bachelor of Science, Electronics Engineering
Skills:
Ic, Analog Circuit Design, Mixed Signal, Cmos, Analog, Semiconductors, Cadence, Verilog, Circuit Design, Cadence Virtuoso, Vlsi, Lvs, Vhdl, Microprocessors, Bicmos, Physical Design, Spice, Spectre, Device Characterization, Floorplanning, Pcb Design