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Oliver R Astley, 50Farmington Hills, MI

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Saratoga Springs, NY   

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Us Patents

Adaptive Data Acquisition For An Imaging System

US Patent:
7388534, Jun 17, 2008
Filed:
Jul 20, 2006
Appl. No.:
11/458713
Inventors:
Oliver Richard Astley - Clifton Park NY, US
John Eric Tkaczyk - Delanson NY, US
Naresh Kesavan Rao - Clifton Park NY, US
James Walter LeBlanc - Niskayuna NY, US
Wen Li - Clifton Park NY, US
Yanfeng Du - Rexford NY, US
Assignee:
General Electric Company - Niskayuna NY
International Classification:
H03M 1/12
US Classification:
341155, 341157
Abstract:
An adaptive data acquisition circuit () includes an amplifier () for amplifying electrical pulses generated by a detector () responsive to energy incident at the detector. The adaptive data acquisition circuit also includes a counting circuit () for counting amplified electrical pulses generated by the amplifier. In addition, the adaptive data acquisition circuit includes a digital logic circuit () for determining a pulse parameter indicative of a pulse rate and an amount of energy present in the amplified electrical pulses and for generating a control signal () responsive to the pulse parameter for controlling an operating parameter of the data acquisition circuit.

Interface Assembly For Thermally Coupling A Data Acquisition System To A Sensor Array

US Patent:
7586096, Sep 8, 2009
Filed:
Nov 17, 2006
Appl. No.:
11/560873
Inventors:
Oliver Richard Astley - Clifton Park NY, US
James Wilson Rose - Guilderland NY, US
Joe James Lacey - Cambridge WI, US
Jonathan David Short - Saratoga Springs NY, US
Ashutosh Joshi - Waukesha WI, US
Assignee:
General Electric Company - Niskayuna NY
International Classification:
G01T 1/24
US Classification:
25037015
Abstract:
An interface assembly for a sensor array is provided. The interface assembly may be made up of an integrated circuit package thermally coupled to the sensor array. The interface assembly may include a temperature control system for controlling the temperature of the sensor array. The temperature control system includes a temperature sensor for sensing a temperature variation of each sensor of the sensor array from an initial temperature beyond a predetermined threshold. A temperature controller is coupled to each temperature sensor and receives an output signal from the temperature sensor upon the sensor temperature variation exceeding the predetermined threshold. A temperature correction device is coupled to each temperature controller and causes the sensor temperature variation to fall within the predetermined threshold upon receiving a control signal from the temperature controller.

Capacitive Integrate And Fold Charge-To-Digital Converter

US Patent:
7936299, May 3, 2011
Filed:
Jun 30, 2009
Appl. No.:
12/495794
Inventors:
Oliver Richard Astley - Niskayuna NY, US
Naresh Kesavan Rao - Niskayuna NY, US
Feng Chen - Niskayuna NY, US
Assignee:
General Electric Company - Niskayuna NY
International Classification:
H03M 1/12
US Classification:
341172, 341155, 341156
Abstract:
A circuit for converting a charge signal into a binary format of output bits comprises: an integration circuit including an operational transconductance amplifier having an inverting input terminal and an output terminal, an integrating capacitor connected between the inverting input terminal and the output terminal, the integrating capacitor for storing a charge input selectively provided by a sensor diode; and a folding circuit having a fold capacitor, the fold capacitor switchably coupled either to a fold voltage source via a fold buffer for charging the fold capacitor to a predetermined fold charge value, or to the integrating capacitor for selectively removing at least a portion of the stored charge input.

Electronic Packaging Technique To Improve Sensor Failure Robustness

US Patent:
8041003, Oct 18, 2011
Filed:
Aug 31, 2009
Appl. No.:
12/551355
Inventors:
Oliver Richard Astley - Niskayuna NY, US
Naveen Chandra - Kenosha WI, US
James Rose - Niskayuna NY, US
Assignee:
General Electric Company - Niskayuna NY
International Classification:
H05G 1/60
US Classification:
378 19
Abstract:
A modular sensor assembly comprises: sensor arrays electrically coupled to a sensor substrate; a plurality of integrated circuits with sensor signal processors electrically coupled to a package substrate; and an interconnect assembly including electrical paths configured to electrically couple analog output signals from a first sensor array to a first integrated circuit and from a second sensor to a second integrated circuit, the first sensor disposed adjacent to the second sensor.

Electrical Interface For A Sensor Array

US Patent:
8492762, Jul 23, 2013
Filed:
Jun 27, 2006
Appl. No.:
11/426617
Inventors:
James Wilson Rose - Guilderland NY, US
Kevin Matthew Durocher - Waterford NY, US
Donna Marie Sherman - East Greenbush NY, US
Oliver Richard Astley - Clifton Park NY, US
Assignee:
General Electric Company - Niskayuna NY
International Classification:
H01L 23/58
US Classification:
257 48, 257691, 257416, 257422, 257433, 257435, 257443, 257659
Abstract:
An interface circuit for a sensor array is provided. The interface circuit may be made up of an integrated circuit package that provides a first region and a second region. The first region may be spaced apart and opposite to the second region of the package. The first region of the package may provide a plurality of interfaces for interconnecting to an integrated circuit in the package a plurality of signals from the sensor array and having a first electrical characteristic, such as analog and test signals. The second region of the package may provide a plurality of interfaces for interconnecting to the integrated circuit a plurality of signals having at least one electrical characteristic different than the first characteristic, such as power and operational digital signals.

Methods, System And Apparatus For Digital Imaging

US Patent:
2003014, Aug 7, 2003
Filed:
Feb 1, 2002
Appl. No.:
10/062334
Inventors:
Ajay Kapur - Clifton Park NY, US
Jeffrey Eberhard - Albany NY, US
Boris Yamrom - Bronx NY, US
Kai Thomenius - Clifton Park NY, US
Donald Buckley - Schenectady NY, US
Roger Johnson - Hagaman NY, US
Reinhold Wirth - Ballston Spa NY, US
Oliver Astley - Clifton Park NY, US
Beale Opsahl-Ong - Darien CT, US
Serge Muller - Guyancourt, FR
Steve Karr - Scotia NY, US
International Classification:
A61B005/05
A61B008/00
A61B008/12
A61B008/14
US Classification:
600/439000
Abstract:
A method for generating an image of an object of interest includes acquiring a first three-dimensional dataset of the object at a first position using an X-ray source and a detector, acquiring a second three-dimensional dataset of the object at the first position using an ultrasound probe, and combining the first three-dimensional dataset and the second three-dimensional dataset to generate a three-dimensional image of the object.

Systems And Methods For Viewing An Abnormality In Different Kinds Of Images

US Patent:
2005008, Apr 28, 2005
Filed:
Oct 23, 2003
Appl. No.:
10/692450
Inventors:
Ajay Kapur - Clifton Park NY, US
Boris Yamrom - Bronx NY, US
Oliver Astley - Clifton Park NY, US
International Classification:
G06K009/00
US Classification:
382128000
Abstract:
A method for viewing an abnormality in different kinds of images is described. The method includes scanning an object using a first imaging system to obtain at least a first image of the object, determining coordinates of a region of interest (ROI) visible on the first image, wherein the ROI includes the abnormality, and using the coordinates of the ROI to scan the object with a second imaging system.

Very Linear Wide-Range Pipelined Charge-To-Digital Converter

US Patent:
2006003, Feb 23, 2006
Filed:
Aug 12, 2005
Appl. No.:
11/203493
Inventors:
Daniel Harrison - Delanson NY, US
Naresh Rao - Clifton Park NY, US
Shobhana Mani - Clifton Park NY, US
Naveen Chandra - Kenosha WI, US
Oliver Astley - Clifton Park NY, US
Donald McGrath - Fort Collins CO, US
International Classification:
H03M 1/12
US Classification:
341155000
Abstract:
A multi-channel analog to digital conversion circuit and methods thereon are provided. The multi-channel analog to digital conversion cirucit comprises a plurality of linearized channels wherein each channel comprises a multi-stage pipelined charge-to-digital converter and an integrating capacitor within each stage of the multi-stage converter wherein analog residue is processed by subsequent analog to digital converter stages. Each stage of respective linearized channels is configured for calculating gain and offset for each stage in the channel and such gain and offset is used in subsequent integration periods.

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