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Pengfei ZhangLothair, MT

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Shelby, MT   

Big Timber, MT   

1018 Custer Ave, Billings, MT 59102   

San Gabriel, CA   

Alhambra, CA   

Pasadena, CA   

Monterey Park, CA   

Farmington, NM   

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Pengfei Zhang

Location:
United States

Publications & IP owners

Us Patents

Differential To Single-Ended Converter With Large Output Swing

US Patent:
6606489, Aug 12, 2003
Filed:
Feb 14, 2001
Appl. No.:
09/784735
Inventors:
Behzad Razavi - Los Angeles CA
Pengfei Zhang - Fremont CA
Assignee:
RF Micro Devices, Inc. - Greensboro NC
International Classification:
H04B 126
US Classification:
455323, 455326, 455330, 455333, 327355
Abstract:
A method and apparatus of converting differential signals to single-ended signals. The method includes receiving a differential signal comprising a first current and a second current and applying the second current to a first load to generate a first voltage. A third current is generated in response to the first voltage. The first current is summed with the third current and applied to a second load to generate the single-ended signal.

Mixer Noise Reduction Technique

US Patent:
6748204, Jun 8, 2004
Filed:
Oct 17, 2000
Appl. No.:
09/691297
Inventors:
Behzad Razavi - Los Angeles CA
Pengfei Zhang - Fremont CA
Assignee:
RF Micro Devices, Inc. - Greensboro NC
International Classification:
H04B 110
US Classification:
455296, 455323, 455326, 455330, 455333, 327355, 330253, 330254
Abstract:
In accordance with the present invention a mixer circuit noise reduction technique is provided. The mixer circuit of the present invention includes a gain stage for receiving a first signal and producing an output signal. The mixer circuit also includes a bias circuit coupled to the gain stage through a common node for providing a bias current to the gain stage, the bias circuit having an input for receiving a second signal, and in accordance therewith, varying the bias current. Additionally, the mixer circuit includes a frequency dependent current shunt circuit coupled between the common node and a reference voltage, wherein a first portion of the bias current frequency components within a first frequency range are coupled to the reference voltage by the shunt circuit, and a second portion of the bias current frequency components within a second frequency range are coupled to the reference voltage by the shunt circuit, the first portion being larger than the second portion. As a result, the noise in the mixer circuit is reduced while the gain is enhanced.

Variable Gain Mixer Circuit

US Patent:
6807406, Oct 19, 2004
Filed:
Oct 17, 2000
Appl. No.:
09/690937
Inventors:
Behzad Razavi - Los Angeles CA
Pengfei Zhang - Fremont CA
Assignee:
RF Micro Devices, Inc. - Greensboro NC
International Classification:
H04B 126
US Classification:
455313, 455139, 4551821, 4552321, 4552341, 375344, 375345
Abstract:
In accordance with embodiments of the present invention, a receiver system is provided with a variable gain mixer circuit that is advantageous over current architectures used in wireless communication systems. The use of a variable gain mixer circuit simplifies the receiver architecture resulting in the elimination of additional circuit blocks and a reduction in complexity and cost. Moreover, one embodiment of the present invention includes a mixer circuit comprising a mixer core, a bias circuit coupled to the mixer core for providing a bias current, and a variable impedance network. The mixer core receives input signals and generates output currents that are coupled to the variable impedance network. Each of the output currents are selectively coupled to a voltage output node through a variable impedance. Variable gain is established by varying the impedance between the output currents of the mixer core and the voltage output node.

Low Noise Mixer Circuit With Improved Gain

US Patent:
6947720, Sep 20, 2005
Filed:
May 2, 2001
Appl. No.:
09/847866
Inventors:
Behzad Razavi - Los Angeles CA, US
Pengfei Zhang - Fremont CA, US
Assignee:
RF Micro Devices, Inc. - Greensboro NC
International Classification:
H04B001/28
US Classification:
455333, 455326, 455 661, 455296, 455323, 455330, 455341, 4553431, 455355, 330 51, 330253, 330254
Abstract:
A mixer circuit of the present invention includes a gain stage configured to receive a first signal and a modulated bias current, and in accordance therewith, produce an output signal, the gain stage generating a first current and receiving the modulated bias current from a bias circuit on a common node. The bias circuit includes an input configured to receive a second signal, and in accordance therewith, generate the modulated bias current. The mixer circuit also includes a current shunt circuit for generating a second current. The first current, the second current, and the modulated bias current are coupled to the common node. In one embodiment, the first signal is approximately a square wave, and the frequency of the first signal is one-third the frequency of the second signal.

Method And Apparatus For Reducing Dc Reducing Offset

US Patent:
2002009, Jul 25, 2002
Filed:
Jan 23, 2001
Appl. No.:
09/768841
Inventors:
Behzad Razavi - Los Angeles CA, US
Pengfei Zhang - Fremont CA, US
Assignee:
Resonext Communications, Inc. - San Jose CA
International Classification:
H03L005/00
US Classification:
327/307000
Abstract:
Various circuits and methods provide for dc offset reduction that is effective under varying circuit and signal conditions. The offset signal is first sampled and stored, and then subtracted from the signal path via a programmable transconductance amplifier that is placed in a feedback loop during offset reduction. By designing the transconductance amplifier to have programmable gain, the offset reduction technique is capable of compensating for variations in the magnitude of the offset signal. In one embodiment, an amplifier is placed in the feedback path in series with the programmable transconductance amplifier to optimize the trade off between noise and accuracy of offset reduction.

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