Peter Cook2920 NE 23Rd St, Pompano Beach, FL 33062

6512397, Jan 28, 2003

Aug 20, 2001

09/933188

Hans M. Jacobson - White Plains NY
Prabhakar N. Kudva - New York NY
Peter W. Cook - Mount Kisco NY
Stanley Everett Schuster - Granite Springs NY

International Business Machines Corporation - Armonk NY

H03K 1720

326121, 326119, 326 95

A method is provided for selecting a participant to issue. The method includes signaling a domino OR gate arbitration device upon a ready request of a participant having a priority, determining within the domino OR gate arbitration device the relative priority of the participant, signaling the domino OR gate arbitration device through an any-request device upon the ready request of a higher priority participant, and issuing the higher priority participant upon determining the higher priority participant to have a priority highest among participants ready for issue. The method includes gating one of a precharge signal and an evaluate signal of the precharged domino OR gate arbitration device by the ready request of the participant. The method further includes latching a result of the domino OR gate arbitration device and a clock signal, and gating the clock signal by the ready signal of the participant.

6608771, Aug 19, 2003

Aug 20, 2001

09/933189

Hans M. Jacobson - White Plains NY
Prabhakar N. Kudva - New York NY
Stanley Everett Schuster - Granite Springs NY
Peter W. Cook - Mount Kisco NY

International Business Machines Corporation - Armonk NY

G11C 1500

365 49, 365203, 365204

A method is provided for associating an address with data. The method includes precharging a matchline connected to a plurality of tag match functions to a first potential, wherein each tag match function comprises one or more match logic devices, discharging two tag lines for a first tag bit to ground, and reading a plurality of tag bits and corresponding data bits onto a plurality of tag lines and a plurality of data lines respectively. The method further includes determining a match between the tag bits and data bits, and pulling the matchline to a second potential upon determining a match for each of the tag bits.

6829716, Dec 7, 2004

Apr 17, 2001

09/836375

Peter W. Cook - Mount Kisco NY
Stanley E. Schuster - Granite Springs NY

International Business Machines Corporation - Armonk NY

G06F 104

713500, 713600, 711109

Circuits and methods for operating a latch structure are disclosed. The circuits include a plurality of stages, and each stage includes a first logic circuit, a latch coupled to a second logic circuit of an adjacent stage and a switch which connects the first logic circuit to the latch in a first state and disconnects the logic circuit from the latch in a second state. A local clock circuit controls the first and second states by providing a locally generated clock signal to activate the switch. The locally generated clock signals are generated by interlocking handshake signals from a local clock circuit of an adjacent stage.

6848060, Jan 25, 2005

Feb 27, 2001

09/794467

Peter W. Cook - Mount Kisco NY, US
Stanley E. Schuster - Granite Springs NY, US

International Business Machines Corporation - Armonk NY

G06F 1342
G06F 300

713400, 713500, 713502, 713600, 713601, 710 52, 710 58, 710 61

An interface between synchronous and asynchronous data transfer includes a plurality of stages coupled to each other to form a pipeline for data transfer. The plurality of stages include a first stage which performs synchronous to asynchronous data transfer, at least one intermediate stage which performs asynchronous to asynchronous data transfer and a last stage which performs asynchronous to synchronous data transfer. A synchronous clock path propagates a timing signal across the plurality of stages to enable the first and last stages to perform operations when the timing signal is present at that stage.

6925549, Aug 2, 2005

Dec 21, 2000

09/746647

Peter William Cook - Bedford Corners NY, US
Andrew Douglas Davies - Rochester MN, US
Stanley Everett Schuster - Granite Springs NY, US
Daniel Lawrence Stasiak - Rochester MN, US

International Business Machines Corporation - Armonk NY

G06F015/00

712 25

An apparatus and method for externally managing data within an asynchronous pipeline. The asynchronous pipeline over which control is sought includes a data path and a control path. In accordance with the method of the present invention, a data tag value is assigned to the data prior to its entry into the asynchronous pipeline. The data tag value is sent into the control path at the same time the data is sent into its data path such that the data tag value passes through the asynchronous pipeline in parallel with the data to which it is assigned. At a given stage within the asynchronous pipeline, the data tag value is compared with a control tag value, and only in response to the data tag value matching the control tag value is the data permitted to pass to the next stage within the asynchronous pipeline.

6946869, Sep 20, 2005

Oct 15, 2003

10/685863

Hans M. Jacobson - White Plains NY, US
Pradip Bose - Yorktown Heights NY, US
Alper Buyuktosunoglu - Putnam Valley NY, US
Peter William Cook - Mount Kisco NY, US
Philip George Emma - Danbury CT, US
Prabhakar N. Kudva - New York NY, US
Stanley Everett Schuster - Granite Springs NY, US

International Business Machines Corporation - Armonk NY

H03K017/16

326 33, 326 93, 327544

Leakage current control devices include a circuit having one or more functions in a data path where the functions are executed in a sequence. Each of the functions has power reduction logic to energize each respective function. A leakage control circuit interacts with the power reduction logic, so that the functions are energized or deenergized in a control sequence such that the functions where the data is resident are energized and at least one of the other functions is not energized.

7065665, Jun 20, 2006

Oct 2, 2002

10/262769

Hans M. Jacobson - White Plains NY, US
Prabhakar N. Kudva - New York NY, US
Pradip Bose - Yorktown Heights NY, US
Peter W. Cook - Mount Kisco NY, US
Stanley E. Schuster - Granite Springs NY, US

International Business Machines Corporation - Armonk NY

H04L 5/00
G06F 9/30

713400, 712219, 712245

An integrated circuit including a pipeline and a method of operating the pipeline. Each stage of the pipeline is triggered by one or more triggering events and are individually, and selectively, stalled by a stall signal. For each stage a stall signal, delayed with respect to the stall signal of a downstream stage, is generated and used to select whether the pipeline stage in question is triggered. A data valid signal propagating with valid data adds further selection, such that only stages with valid data are stalled.

7076681, Jul 11, 2006

Jul 2, 2002

10/187698

Pradip Bose - Yorktown Heights NY, US
Daniel M. Citron - Riverdale NY, US
Peter W. Cook - Mount Kisco NY, US
Philip G. Emma - Danbury CT, US
Hans M. Jacobson - White Plains NY, US
Prabhakar N. Kudva - New York NY, US
Stanley E. Schuster - Granite Springs NY, US
Jude A. Rivers - Cortlandt Manor NY, US
Victor V. Zyuban - Yorktown Heights NY, US

International Business Machines Corporation - Armonk NY

G06F 1/04

713600, 713320

A synchronous integrated circuit such as a scalar processor or superscalar processor. Circuit components or units are clocked by and synchronized to a common system clock. At least two of the clocked units include multiple register stages, e. g. , pipeline stages. A local clock generator in each clocked unit combines the common system clock and stall status from one or more other units to adjust register clock frequency up or down.