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Peter A Doyle, 43Vancouver, WA

Peter Doyle Phones & Addresses

Vancouver, WA   

Minneapolis, MN   

Sylmar, CA   

Pearblossom, CA   

Los Angeles, CA   

Work

Company: Self employed Jun 2012 Position: Project development consultant

Education

School / High School: Pierce College Dec 2011 Specialities: Associates of Arts in Liberal Arts and Sciences

Skills

Data Entry • General Labor • Hospital Care • Tutoring • General Housekeeping • Cashiering • Greeting • Ventilator management • Data Entry.

Ranks

Licence: New Jersey - Active Date: 2012

Mentions for Peter A Doyle

Career records & work history

Lawyers & Attorneys

Peter Doyle Photo 1

Peter E Doyle - Lawyer

Licenses:
New Jersey - Active 2012
Peter Doyle Photo 2

Peter Doyle - Lawyer

Office:
Dickinson Wright PLLC
ISLN:
922967382
Admitted:
2013
University:
Notre Dame
Peter Doyle Photo 3

Peter Doyle - Lawyer

Office:
Barristers Chambers of Edmund Lawson, Q.C.
ISLN:
901077903
Admitted:
1975
Peter Doyle Photo 4

Peter Doyle - Lawyer

ISLN:
907763473
Admitted:
1970
University:
UC Davis SOL King Hall; Davis CA; St Mary's Coll; Moraga CA
Peter Doyle Photo 5

Peter Doyle - Lawyer

Office:
Kirkland & Ellis LLP
Specialties:
Environmental and Natural Resources, Antitrust & Competition, Intellectual Property, Litigation, Class Action, Mass Tort & Toxic Tort Litigation, Commercial Litigation, International Arbitration & ADR, Product Liability & Mass Tort Litigation, Securities & Shareholder Litigation, Outsourcing
ISLN:
910159904
Admitted:
1994
University:
Swarthmore College, B.A., 1988
Law School:
Fordham University School of Law, J.D., 1993
Peter Doyle Photo 6

Peter Duffy Doyle - Lawyer

Phone:
212-4464678 (Phone), 212-4464900 (Fax)
Work:
Kirkland & Ellis LLP, Partner
Experience:
30 years
Specialties:
Antitrust, Arbitration & Mediation, Business Law, International Law, Patents, Personal Injury, Products Liability, Securities Law, Antitrust & Competition, Class Action, Mass Tort & Toxic Tort Litigation, Commercial Litigation, General Civil, Intellectual Property, International Arbitration & ADR, Litigation, Product Liability Litigation, Securities & Shareholder Litigation
Jurisdiction:
Illinois (1996)
Illinois 1996
New York (1994)
New York 1994
Law School:
Fordham University
Education:
Fordham University, JD
Swarthmore College, BA
Links:
Website

Medicine Doctors

Peter D. Doyle

Specialties:
Anesthesiology
Work:
UT PhysiciansUT Medical School Houston Anesthesiology
6431 Fannin St Msb 5020, Houston, TX 77030
713-5006222 (phone) 713-5006208 (fax)
Site
Education:
Medical School
University of Texas Medical School at Houston
Graduated: 1988
Languages:
English
Description:
Dr. Doyle graduated from the University of Texas Medical School at Houston in 1988. He works in Houston, TX and specializes in Anesthesiology. Dr. Doyle is affiliated with Lyndon Baines Johnson General Hospital, Memorial Hermann Texas Medical Center, Texas Childrens Hospital and University Of Texas MD Anderson Cancer Center.

License Records

Peter Doyle

Licenses:
License #: ="31770" - Active
Issued Date: Jan 10, 2014
Renew Date: Dec 1, 2015
Expiration Date: Nov 30, 2017
Type: Certified Public Accountant

Peter Charles Doyle

Licenses:
License #: MT043140T - Expired
Category: Medicine
Type: Graduate Medical Trainee

Peter Doyle resumes & CV records

Resumes

Peter Doyle Photo 60

Peter Doyle

Location:
United States
Peter Doyle Photo 61

Engineer At Dod/Usmc

Position:
Engineer at dod/usmc
Location:
US Military Posts in the Pacific
Industry:
Military
Work:
dod/usmc
Engineer
Peter Doyle Photo 62

Owner, Halsted Canyon Llc

Position:
Owner at Halsted Canyon LLC
Location:
Greater Minneapolis-St. Paul Area
Industry:
Investment Management
Work:
Halsted Canyon LLC
Owner
Peter Doyle Photo 63

Peter Doyle

Location:
United States
Peter Doyle Photo 64

Peter Doyle

Location:
United States
Peter Doyle Photo 65

Peter Doyle

Location:
United States
Peter Doyle Photo 66

Peter Doyle

Location:
United States
Peter Doyle Photo 67

Peter Doyle - Minneapolis, MN

Work:
Self Employed Jun 2012 to 2000
Project Development Consultant
Medical School At Saint 2012 to Jan 2012
Student
Associates Degree in Respiratory Care 2011 to Dec 2011
Respiratory Therapist
Tri-Valley Respiratory Care - Newbury Park, CA Aug 2001 to Dec 2011
Respiratory Therapist
Tri-Valley Respiratory Care Aug 2008 to Sep 2011
Respiratory Therapist
Cedar's Sinai Medical Center Jul 1999 to Jul 2002
Respiratory Care Practitioner
Education:
Pierce College Dec 2011
Associates of Arts in Liberal Arts and Sciences
UCLA - Los Angeles, CA Aug 2004 to Jun 2007
Bachelor of Science in Biochemistry
University of Phoenix
MBA in program
Skills:
Data Entry, General Labor, Hospital Care, Tutoring, General Housekeeping, Cashiering, Greeting, Ventilator management, Data Entry.

Publications & IP owners

Wikipedia

Peter Doyle Photo 68

Peter Doyle (Writer)

Dr. Peter Doyle, BA, Phd (born 1951) is a doctor of Media and Mass Communications, author, musician, and visual artist. He lives in Newtown, and works for ...

Us Patents

Position-Based Rendering Apparatus And Method For Multi-Die/Gpu Graphics Processing

US Patent:
2022036, Nov 17, 2022
Filed:
Jul 28, 2022
Appl. No.:
17/876358
Inventors:
- Santa Clara CA, US
ZACK WATERS - Portland OR, US
MICHAEL APODACA - El Dorado Hills CA, US
DANIEL JOHNSTON - Portland OR, US
JASON SURPRISE - Beaverton OR, US
PRASOONKUMAR SURTI - Folsom CA, US
SUBRAMANIAM MAIYURAN - Gold River CA, US
PETER DOYLE - Gold River CA, US
SAURABH SHARMA - El Dorado Hills CA, US
ANKUR SHAH - Folsom CA, US
MURALI RAMADOSS - Folsom CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06T 15/00
G06T 15/40
G06T 15/80
Abstract:
Position-based rendering apparatus and method for multi-die/GPU graphics processing. For example, one embodiment of a method comprises: distributing a plurality of graphics draws to a plurality of graphics processors; performing position-only shading using vertex data associated with tiles of a first draw on a first graphics processor, the first graphics processor responsively generating visibility data for each of the tiles; distributing subsets of the visibility data associated with different subsets of the tiles to different graphics processors; limiting geometry work to be performed on each tile by each graphics processor using the visibility data, each graphics processor to responsively generate rendered tiles; and wherein the rendered tiles are combined to generate a complete image frame.

Apparatus And Method For Foveated Rendering, Bin Comparison And Tbimr Memory-Backed Storage For Virtual Reality Implementations

US Patent:
2022026, Aug 18, 2022
Filed:
Mar 1, 2022
Appl. No.:
17/683533
Inventors:
- Santa Clara CA, US
Brent E. INSKO - Portland OR, US
Prasoonkumar SURTI - Folsom CA, US
Adam T. LAKE - Portland OR, US
Peter L. DOYLE - El Dorado Hills CA, US
Daniel POHL - Puchheim, DE
International Classification:
G06F 3/01
G02B 27/00
Abstract:
One embodiment of a virtual reality apparatus comprises: a graphics processing engine comprising a plurality of graphics processing stages, the graphics processing engine to render a plurality of image frames for left and right displays of a head mounted display (HMD); and foveation control hardware logic to independently control two or more of the plurality of graphics processing stages based on feedback received from an eye tracking module of the HMD, the feedback indicating a foveated region selected based on a current or anticipated direction of a user's gaze, the foveation control hardware logic to cause the two or more of the graphics processing stages to process the foveated region differently than other regions of the image frames.

Position-Based Rendering Apparatus And Method For Multi-Die/Gpu Graphics Processing

US Patent:
2021027, Sep 2, 2021
Filed:
May 3, 2021
Appl. No.:
17/306769
Inventors:
- Santa Clara CA, US
ZACK WATERS - Portland OR, US
MICHAEL APODACA - Folsom CA, US
DANIEL JOHNSTON - Portland OR, US
JASON SURPRISE - Beaverton OR, US
PRASOONKUMAR SURTI - Folsom CA, US
SUBRAMANIAM MAIYURAN - Gold River CA, US
PETER DOYLE - El Dorado Hills CA, US
SAURABH SHARMA - El Dorado Hills CA, US
ANKUR SHAH - Folsom CA, US
MURALI RAMADOSS - Folsom CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06T 15/00
G06T 15/40
G06T 15/80
Abstract:
Position-based rendering apparatus and method for multi-die/GPU graphics processing. For example, one embodiment of a method comprises: distributing a plurality of graphics draws to a plurality of graphics processors; performing position-only shading using vertex data associated with tiles of a first draw on a first graphics processor, the first graphics processor responsively generating visibility data for each of the tiles; distributing subsets of the visibility data associated with different subsets of the tiles to different graphics processors; limiting geometry work to be performed on each tile by each graphics processor using the visibility data, each graphics processor to responsively generate rendered tiles; and wherein the rendered tiles are combined to generate a complete image frame.

Apparatus And Method For Optimized Tile-Based Rendering

US Patent:
2021003, Feb 4, 2021
Filed:
Oct 16, 2020
Appl. No.:
17/072253
Inventors:
- Santa Clara CA, US
Tomas G. AKENINE-MOLLER - Lund, SE
David J. COWPERTHWAITE - Portland OR, US
Kun TIAN - Shanghai, CN
Peter L. DOYLE - El Dorado Hills CA, US
Brent E. INSKO - Portland OR, US
Adam T. LAKE - Portland OR, US
International Classification:
G06T 15/00
G06T 1/20
G06T 1/60
G06T 15/40
G06T 15/50
Abstract:
A virtual reality apparatus and method are described for tile-based rendering. For example, one embodiment of an apparatus comprises: a set of on-chip geometry buffers including a first buffer to store geometry data, and a set of pointer buffers to store pointers to the geometry data; a tile-based immediate mode rendering (TBIMR) module to perform tile-based immediate mode rendering using geometry data and pointers stored within the set of on-chip geometry buffers; spill circuitry to determine when the on-chip geometry buffers are over-subscribed and responsively spill additional geometry data and/or pointers to an off-chip memory; and a prefetcher to start prefetching the geometry data from the off-chip memory as space becomes available within the on-chip geometry buffers, the TBIMR module to perform tile-based immediate mode rendering using the geometry data prefetched from the off-chip memory.

Apparatus And Method For Foveated Rendering, Bin Comparison And Tbimr Memory-Backed Storage For Virtual Reality Implementations

US Patent:
2020033, Oct 22, 2020
Filed:
May 5, 2020
Appl. No.:
16/867248
Inventors:
- Santa Clara CA, US
Brent E. INSKO - Portland OR, US
Prasoonkumar SURTI - Folsom CA, US
Adam T. LAKE - Portland OR, US
Peter L. DOYLE - El Dorado Hills CA, US
Daniel POHL - Puchheim, DE
International Classification:
G06F 3/01
G02B 27/00
Abstract:
One embodiment of a virtual reality apparatus comprises: a graphics processing engine comprising a plurality of graphics processing stages, the graphics processing engine to render a plurality of image frames for left and right displays of a head mounted display (HMD); and foveation control hardware logic to independently control two or more of the plurality of graphics processing stages based on feedback received from an eye tracking module of the HMD, the feedback indicating a foveated region selected based on a current or anticipated direction of a user's gaze, the foveation control hardware logic to cause the two or more of the graphics processing stages to process the foveated region differently than other regions of the image frames.

High Vertex Count Geometry Work Distribution For Multi-Tile Gpus

US Patent:
2020017, Jun 4, 2020
Filed:
Dec 4, 2018
Appl. No.:
16/208715
Inventors:
- Santa Clara CA, US
ZACK WATERS - PORTLAND OR, US
MICHAEL APODACA - FOLSOM CA, US
JASON SURPRISE - Santa Clara CA, US
PETER DOYLE - GOLD RIVER CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06T 1/20
G06F 9/50
Abstract:
Embodiments described herein provide data processing device comprising a processor, a memory, and a large draw monitor comprising a processing unit to determine whether a vertex count for a graphics workload exceeds a threshold value, and in response to a determination that the vertex count for the graphics workload exceeds the threshold value, to divide the graphics workload over graphics processing units instantiated on multiple separate tiles. Other embodiments may be described and claimed.

Apparatus And Method For An Efficient 3D Graphics Pipeline

US Patent:
2018008, Mar 22, 2018
Filed:
Sep 16, 2016
Appl. No.:
15/268495
Inventors:
TOMAS G. AKENINE-MOLLER - Lund, SE
ROBERT M. TOTH - Lund, SE
BRENT E. INSKO - Portland OR, US
PETER L. DOYLE - El Dorado Hills CA, US
PRASOONKUMAR SURTI - Folsom CA, US
MAIYURAN SUBRAMANIAM - Gold River CA, US
CARL JACOB MUNKBERG - Malmo, SE
FRANZ PETRIK CLARBERG - Lund, SE
JON N. HASSELGREN - Bunkeflostrand, SE
International Classification:
G06T 15/00
G06T 17/10
G06T 15/80
G06T 15/30
G06T 15/40
G06T 17/20
G06T 15/04
G06T 15/20
Abstract:
A graphics processing apparatus and method are described. For example, one embodiment of a graphics processing apparatus comprises: an input assembler of a graphics pipeline to determine a first set of triangles to be drawn based on application-provided parameters; a depth buffer to store depth data related to the first set of triangles; a vertex shader to perform position-only vertex shading operations on the first set of triangles in response to an indication that the graphics pipeline is to initially operate in a depth-only mode; a culling and clipping module to read depth values from the depth buffer to identify those triangles in the first set of triangles which are fully occluded by other objects in a current frame and to generate culling data usable to cull occluded triangles, the culling and clipping module to associate the culling data with a replay token to be used to identify a subsequent rendering pass through the graphics pipeline; the input assembler, upon detecting the replay token in the subsequent rendering pass, to access the culling data associated therewith to remove culled triangles from the first set of triangles to generate a second set of triangles; the vertex shader to perform full vertex shading operations on the second set of triangles during the subsequent rendering pass, the replay token to be destroyed during or following the subsequent rendering pass.

Isbn (Books And Publications)

Basic Arterial Blood Gas Interpretation

Author:
Peter Reese Doyle
ISBN #:
0316984698

Random Walks And Electrical Networks

Author:
Peter G. Doyle
ISBN #:
0883850249

Inflation:selected Readings: Selected Readings

Author:
Peter Doyle
ISBN #:
0140800328

Analytical Marketing Management

Author:
Peter Doyle
ISBN #:
0063180170

Analytical Marketing Management

Author:
Peter Doyle
ISBN #:
0063180189

Westminster Cathedral: 1895-1995

Author:
Peter Doyle
ISBN #:
0225666847

Marketing Management And Strategy

Author:
Peter Doyle
ISBN #:
0273651501

Marketing Management And Strategy

Author:
Peter Doyle
ISBN #:
0273693980

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