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James Young Cho, 6014330 Misty Meadow Ln, Houston, TX 77079

Known as:
James Y Cho Young Mee Lim Young Do Lim Young J Cho Young M Lim Young M Cho Yount Do Lim Mee Young Lim Yount Lim Mee Lim Young Joon Cho Young
Related to:
Grace K Kim 60

James Cho Phones & Addresses

Houston, TX   

Katy, TX   

Spring, TX   

Carrollton, TX   

Irving, TX   

Des Moines, IA   

Work

Company: Keller Williams - Frisco Address: 4783 Preson Road, Suite 100, Frisco, TX 75034 Phones: 214-7700828 (Office)
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Mentions for James Young Cho

Career records & work history

Real Estate Brokers

James Cho Photo 1

James Cho, McKinney TX - Agent

Specialties:
Residential sales
Luxury homes
First time home buyers
Relocation
Work:
Keller Williams Realty Frisco Stars
Mckinney, TX
214-7700828 (Phone)
License #0617846
Certifications:
GRI
SRS
Client type:
Home Buyers
Home Sellers
Property type:
Single Family Home
Condo/Townhome
Residential Rental
Skills:
Negotiation
home valuation
marketing
James Cho Photo 2

James Cho, Plano TX - Agent

Specialties:
Residential sales
Luxury homes
First time home buyers
Property Management
Work:
Keller Williams
Plano, TX
214-7700828 (Phone)
Client type:
Home Buyers
Home Sellers
Property type:
Single Family Home
Multi-family
Residential Rental
Languages:
English
Korean
James Cho Photo 3

James Cho

Specialties:
Buyer's Agent, Listing Agent
Work:
Keller Williams - Frisco
4783 Preson Road, Suite 100, Frisco, TX 75034
214-7700828 (Office)

Medicine Doctors

James Cho

Specialties:
Family Medicine
Work:
Saint John Providence Physician NetworkCornerstone Garfield Family Practice
42645 Garfield Rd STE 103, Clinton Township, MI 48038
586-2860050 (phone) 586-2860880 (fax)
Site
Education:
Medical School
Michigan State University College of Osteopathic Medicine
Graduated: 1995
Procedures:
Allergen Immunotherapy, Arthrocentesis, Destruction of Benign/Premalignant Skin Lesions, Electrocardiogram (EKG or ECG), Hearing Evaluation, Pulmonary Function Tests, Skin Tags Removal, Vaccine Administration
Conditions:
Abdominal Hernia, Acne, Acute Bronchitis, Acute Pharyngitis, Acute Sinusitis, Acute Upper Respiratory Tract Infections, Allergic Rhinitis, Alopecia Areata, Anal Fissure, Anal or Rectal Abscess, Anxiety Dissociative and Somatoform Disorders, Anxiety Phobic Disorders, Attention Deficit Disorder (ADD), Benign Prostatic Hypertrophy, Breast Disorders, Calculus of the Urinary System, Candidiasis, Candidiasis of Vulva and Vagina, Carpel Tunnel Syndrome, Cholelethiasis or Cholecystitis, Chronic Sinusitis, Constipation, Contact Dermatitis, Dermatitis, Disorders of Lipoid Metabolism, Diverticulitis, Erectile Dysfunction (ED), Esophagitis, Fractures, Dislocations, Derangement, and Sprains, Gastritis and Duodenitis, Gastrointestinal Hemorrhage, Gout, Hearing Loss, Hemorrhoids, Herpes Simplex, Herpes Zoster, Inflammatory Bowel Disease (IBD), Inguinal Hernia, Intervertebral Disc Degeneration, Iron Deficiency Anemia, Lateral Epicondylitis, Non-Toxic Goiter, Otitis Media, Peripheral Nerve Disorders, Plantar Fascitis, Plantar Warts, Rosacea, Rotator Cuff Syndrome and Allied Disorders, Sciatica, Skin and Subcutaneous Infections, Tempromandibular Joint Disorders (TMJ), Tension Headache, Tinea Unguium, Urinary Tract Infection (UT), Vitamin D Deficiency, Abnormal Vaginal Bleeding, Acute Pancreatitis, Acute Renal Failure, Alzheimer's Disease, Anemia, Angina Pectoris, Ankylosing Spondylitis (AS), Aortic Valvular Disease, Appendicitis, Atopic Dermatitis, Atrial Fibrillation and Atrial Flutter, Bacterial Food Poisoning, Bacterial Pneumonia, Bell's Palsy, Benign Paroxysmal Positional Vertigo, Benign Polyps of the Colon, Benign Thyroid Diseases, Bipolar Disorder, Bronchial Asthma, Burns, Cardiac Arrhythmia, Cardiomyopathy, Cataract, Chronic Bronchitis, Chronic Fatigue Syndrome, Chronic Renal Disease, Conduction Disorders, Congenital Anomalies of the Heart, Croup, Dehydration, Dementia, Depressive Disorders, Diabetes Mellitus (DM), Diabetic Peripheral Neuropathy, Diverticulosis, Endometriosis, Epilepsy, Gastroesophageal Reflux Disease (GERD), Genital HPV, Gingival and Periodontal Diseases, Hallux Valgus, Heart Failure, Hemolytic Anemia, Hemorrhagic stroke, Herpes Genitalis, Hypertension (HTN), Hyperthyroidism, Hypothyroidism, Infectious Liver Disease, Infectious Mononucleosis, Internal Derangement of Knee, Internal Derangement of Knee Cartilage, Irritable Bowel Syndrome (IBS), Ischemic Stroke, Keratitis, Labyrinthitis, Male Infertility, Melanoma, Menopausal and Postmenopausal Disorders, Migraine Headache, Mitral Valvular Disease, Multiple Sclerosis (MS), Obsessive-Compulsive Disorder (OCD), Orbital Infection, Osteoarthritis, Osteomyelitis, Osteoporosis, Overweight and Obesity, Parkinson's Disease, Peptic Ulcer Disease, Phlebitis and Thrombophlebitis, Pneumonia, Polycystic Ovarian Syndrome (PCOS), Post Traumatic Stress Disorder (PTSD), Premenstrual Syndrome (PMS), Prostatitis, Psoriasis, Pulmonary Embolism, Restless Leg Syndrome, Rheumatoid Arthritis, Sarcoidosis, Scoliosis or Kyphoscoliosis, Skin Cancer, Spinal Stenosis, Substance Abuse and/or Dependency, Thyroid Cancer, Thyroiditis, Tinea Pedis, Transient Cerebral Ischemia, Urinary Incontinence, Uterine Leiomyoma, Varicose Veins, Venous Embolism and Thrombosis, Ventral Hernia, Viral Meningitis
Languages:
Arabic, English, Spanish
Description:
Dr. Cho graduated from the Michigan State University College of Osteopathic Medicine in 1995. He works in Clinton Township, MI and specializes in Family Medicine. Dr. Cho is affiliated with St John Hospital & Medical Center.
James Cho Photo 4

James Yongsoo Cho

Specialties:
Pediatrics
Family Medicine
Education:
Catholic University Of Korea (1962)

Publications & IP owners

Us Patents

Using Phase Interpolator Information To Detect A Loss Of Lock Condition During Recovery Of A Clock Signal From A Received Data Stream

US Patent:
6856661, Feb 15, 2005
Filed:
Mar 8, 2001
Appl. No.:
09/801534
Inventors:
James B. Cho - Plano TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H04L025/00
US Classification:
375371, 327291
Abstract:
A loss of lock condition of a clock signal () recovered from a received data stream can be detected by examining conventionally available information () indicative of a rate of change of an interpolation ratio according to which first and second phases of a local reference clock signal are combined to form the recovered clock signal.

Automatic Bit-Rate Detection Scheme For Use On Sonet Transceiver

US Patent:
7050463, May 23, 2006
Filed:
Oct 31, 2000
Appl. No.:
09/703430
Inventors:
James B. Cho - Plano TX, US
Harry W. Hartjes - Plano TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H04J 3/00
US Classification:
370476, 370907
Abstract:
An automatic bit-rate detection scheme () for use in SONET/SDH transceivers () that uses only one clocking frequency (clk), is all digital, and requires less than 250 microseconds to detect a new data bit-rate. The present invention analyzes events that are guaranteed to be present in all SONET data streams. A1 and A2 framing bytes () occur at 125 microseconds intervals in all SONET signals. The bit transitions in the framing bytes represent the minimum transition intervals of the received data. The present invention examines this bit interval to determine the operating frequency of the received data. A set of combinational logic circuits () are used to detect specific data bit patterns which appear in the A1 and A2 SONET framing bytes, such as “010” and “101”. The combinational circuit looks for specific patterns of data bits occurring at a specific communication rate. Latches () capture the pulses that are generated by the combinational circuits each time that the particular bit pattern is detected.

Method And Apparatus For Synthesizing A Clock Signal Having A Frequency Near The Frequency Of A Source Clock Signal

US Patent:
7323917, Jan 29, 2008
Filed:
Sep 15, 2003
Appl. No.:
10/662596
Inventors:
James B. Cho - Plano TX, US
Christian Harrieder - Freising, DE
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H04L 7/00
US Classification:
327158, 327156, 331 34
Abstract:
An apparatus and method of synthesizing an output clock signal from a source clock signal. The clock synthesizer includes a phase generator, a phase selector, a phase interpolator, and control circuitry for controlling the phase selector/interpolator. The phase generator receives a high speed clock, and generates P phases of the source clock to define P phase sectors. The phase selector selects respective pairs of phases such that each pair bounds a respective phase sector. The phase interpolator introduces at least one phase of the source clock between each pair of phases to provide Q phases of the source clock within each sector. The phase interpolator uses the phases of the source clock to produce lagging (leading) phase shifts of 360/P(Q−1) degrees, thereby generating the output clock having a stepped up or stepped down frequency.

Apparatus And Method For Dynamically Adjusting Receiver Bandwidth

US Patent:
7443935, Oct 28, 2008
Filed:
Nov 2, 2002
Appl. No.:
10/286925
Inventors:
James B. Cho - Plano TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H04L 27/06
H04L 7/00
US Classification:
375344, 375355
Abstract:
An apparatus for adjusting bandwidth for a receiver includes: (a) a receiver clock operating according to receiver clock parameters related to received signals for sampling received signals; (b) a local clock; (c) a tracker receiving an indicator related to the receiver clock parameter and generating a tracking parameter for comparing the receiver clock parameter and periodicity of the local clock; (d) a counter for counting events associated with the tracking parameter and generating an event count relating to the received signals; (e) a decision unit for reckoning the event count and generate a decision parameter relating to the reckoning; and (f) output logic coupled with the decision unit, the tracker and the receiver clock for evaluating the decision parameter and the tracking parameter by a logical routine for determining a need for changing operation of the receiver clock and for generating a change signal when the need exists.

Built-In Self Test Method And Apparatus For Jitter Transfer, Jitter Tolerance, And Fifo Data Buffer

US Patent:
2005019, Sep 1, 2005
Filed:
Feb 25, 2004
Appl. No.:
10/786966
Inventors:
James Cho - Plano TX, US
Bhavesh Bhakta - Richardson TX, US
International Classification:
H03B019/00
G11C029/00
US Classification:
714710000
Abstract:
Testing a transceiver includes providing a sequence of test signals. A serialization clock is generated and jitter is added to the clock in a known and controlled manner. The test signals can then be transmitted using the serialization clock. After the test signals are recovered by the clock and data recovery mechanism, the recovered sequence is compared to the original sequence, to test for jitter tolerance. Preferably, each of these steps is performed on chip. In other aspects, a jitter transfer test and/or a FIFO test can be performed.

Pll Using Pulse Width Detection For Frequency And Phase Error Correction

US Patent:
6005425, Dec 21, 1999
Filed:
Feb 4, 1998
Appl. No.:
9/018639
Inventors:
James Cho - Plano TX
Assignee:
VIA-Cyrix Inc. - Richardson TX
International Classification:
H03L 708
US Classification:
327156
Abstract:
A digital PLL in uses pulse width detection to provide frequency/phase error correction for a DCO. A pulse width detector is implemented using fine and coarse detection circuits which provide selectable fine and coarse detection granularity. Both the fine and coarse detection circuits use a number of individual detector elements coupled in sequence--a phase error pulse propagates through the detector elements which quantize pulse width detection. Each detector element includes a pulse width detect latch that latches an phase error pulse width indication for the current cycle and the previous cycle. A comparator determines in each cycle whether the phase error pulse width has changed--a phase correction signal is generated if either (a) the fine detection circuit detects that the phase error pulse width is increasing, or (b) the course detection circuit detects that the phase error is not decreasing.

Public records

Vehicle Records

James Cho

Address:
26325 Northgate Xing Blvd, Spring, TX 77373
Phone:
281-6512309
VIN:
1HGCM665X7A075141
Make:
HONDA
Model:
ACCORD
Year:
2007

Possible Relatives

Cynthia E Cho  David W Cho  Dae S Cho  Dana Cho  Daniel S Cho  Aaron H Cho  Denise Cho  James V Johnson  James C Stamps  James E Stanage 

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