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Puneet Singh, 554192 Denker Dr, Pleasanton, CA 94588

Puneet Singh Phones & Addresses

2064 Mayfield Ave, San Jose, CA 95130    408-3747454    408-3407798   

Pleasanton, CA   

Mountain View, CA   

Belmont, CA   

1405 Marshall St APT 709, Redwood City, CA 94063   

Sunnyvale, CA   

Santa Clara, CA   

Iowa City, IA   

Work

Position: Ux lead

Education

School / High School: Punjabi University 2001 Specialities: PG Dip in Industrial Design

Ranks

Licence: California - Active Date: 2001

Mentions for Puneet Singh

Career records & work history

Lawyers & Attorneys

Puneet Singh Photo 1

Puneet Kaur Singh, Walnut Creek CA - Lawyer

Address:
500 Ygnacio Valley Rd Ste 290, Walnut Creek, CA 94596
800-5251690 (Office)
Licenses:
California - Active 2001
Education:
University of San Francisco School of LawDegree J.D.Graduated 2001
University of California - DavisDegree B.A.Graduated 1997
Specialties:
Real Estate - 40%
Litigation - 20%
Contracts / Agreements - 20%
Foreclosure - 20%
Puneet Singh Photo 2

Puneet Kaur Singh, Pleasanton CA - Lawyer

Address:
5994 W Las Positas Blvd, Pleasanton, CA 94588
Phone:
925-4691690 (Phone), 925-4692655 (Fax)
Experience:
24 years
Jurisdiction:
California (2001)
Law School:
U of San Francisco School of Law
Education:
Univ of California Davis, Undergraduate Degree
U of San Francisco School of Law, Law Degree
Memberships:
California State Bar (2001)

Medicine Doctors

Puneet Singh Photo 3

Puneet Singh

Specialties:
Surgery

Puneet Singh resumes & CV records

Resumes

Puneet Singh Photo 44

Puneet Singh

Work:
UX LEAD 2007 to 2000 Conducting User Research 2007 to 2007
UX DESIGNER
Education:
Punjabi University 2001 to 2003
PG Dip in Industrial Design

Publications & IP owners

Us Patents

Method And Apparatus To Analyze Noise In A Pulse Logic Digital Circuit Design

US Patent:
7107552, Sep 12, 2006
Filed:
Jun 10, 2003
Appl. No.:
10/458458
Inventors:
Puneet Singh - Santa Clara CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 17/50
US Classification:
716 4, 716 5
Abstract:
A method and apparatus to analyze noise in a pulse logic digital circuit comprising identifying a channel connected component (CCC) in the pulse logic digital circuit design, said CCC comprising a pulse generator. Modifying the pulse logic digital circuit by disconnecting the pulse generator form an input of the CCC in the pulse logic digital circuit design. Turning on the pulse logic digital circuit, inputting a noise signal to the CCC and monitoring an output of the pulse logic digital circuit during the time the pulse logic digital circuit is turn on.

Method And Apparatus For Scan Design Using A Formal Verification-Based Process

US Patent:
6748352, Jun 8, 2004
Filed:
Dec 30, 1999
Appl. No.:
09/474942
Inventors:
Joel T. Yuen - Mesa AZ
Kailasnath S. Maneparambil - Chandler AZ
Puneet Singh - San Jose CA
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 1750
US Classification:
703 16, 716 5, 716 18
Abstract:
A scan cell design approach includes removing a formal verification property associated with a scan cell from a set of formal verification properties to create a reduced set of formal verification properties. A formal verification assumption verification process is then performed on a schematic using assumptions generated from the reduced set of formal verification properties. An output of the assumption verification process indicates whether there is a potential contention site at logic coupled to the output of the scan cell.

System For Enabling Communications And Conferencing Between Dissimilar Computing Devices Including Mobile Computing Devices

US Patent:
2017022, Aug 3, 2017
Filed:
Apr 14, 2017
Appl. No.:
15/487707
Inventors:
- San Jose CA, US
Puneet Singh - San Jose CA, US
Vaibhav Pande - Kondapur, Hyderabad, IN
International Classification:
H04L 29/06
G06F 3/0484
G06F 3/0482
H04N 7/15
Abstract:
In one general embodiment, a system for enabling communications and conferencing between dissimilar computing devices including mobile computing devices. In another embodiment a method for enabling communications and conferencing between dissimilar computing devices including mobile computing devices. In a further embodiment, a non-transitory computer-readable medium comprising instructions to cause one or more processors to enable communications and conferencing between dissimilar computing devices including mobile computing devices.

System For Enabling Communications And Conferencing Between Dissimilar Computing Devices Including Mobile Computing Devices

US Patent:
2015009, Apr 9, 2015
Filed:
Oct 3, 2014
Appl. No.:
14/506234
Inventors:
- San Jose CA, US
Puneet Singh - San Jose CA, US
Vaibhav Pande - Hyderabad, IN
International Classification:
H04N 7/15
US Classification:
348 1408
Abstract:
In one general embodiment, a system for enabling communications and conferencing between dissimilar computing devices including mobile computing devices. In another embodiment a method for enabling communications and conferencing between dissimilar computing devices including mobile computing devices. In a further embodiment, a non-transitory computer-readable medium comprising instructions to cause one or more processors to enable communications and conferencing between dissimilar computing devices including mobile computing devices.

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